Thin film transistor, array substrate and display device

Abstract

The invention discloses a thin film transistor, an array substrate and a display device. The thin film transistor comprises a grid electrode, a source electrode, a drain electrode and a semiconductor layer, wherein the source electrode and the drain electrode are arranged on different layers, the semiconductor layer is electrically connected with the source electrode and the drain electrode, and a channel region is formed on the portion, corresponding to the region between the source electrode and the drain electrode, of the semiconductor layer. The invention further provides the array substrate comprising the thin film transistor and the display device. According to the array substrate comprising the thin film transistor and the display device, the source electrode and the drain electrode are made to be formed on different layers by changing the pattern composition technology, a channel, which is originally 15-micron long, of the thin film transistor is reduced to be smaller than 5 microns at present, the resistance of the channel is greatly reduced, the charging efficiency of the thin film transistor can be greatly improved by reducing the length of the channel, charging time is shortened, and thus the working efficiency of the transistor is improved. Due to the fact that the size of the channel of the transistor is reduced, the area of the transistor can also be reduced, and products which are high in integration level can be obtained easily.

Description

technical field [0001] The invention relates to the field of liquid crystal display, in particular to a thin film transistor, an array substrate and a display device. Background technique [0002] Currently in the liquid crystal display industry, the application of Thin Film Transistor Liquid Crystal Display (TFT-LCD for short) is more and more favored by customers. [0003] The structure diagram of the thin film transistor in the liquid crystal display in the prior art is as follows figure 1 As shown, it includes a base substrate 01 and a gate 02 formed on the base substrate 01 , and the gate 02 is covered with a gate insulating layer 03 . A semiconductor layer 04 is also formed above the gate insulating layer 03 , this layer corresponds to the gate 02 and is located above the gate 02 . An etching stopper layer 05 is formed above the semiconductor layer 04, and a source-drain metal layer is formed above the etch stopper layer 05, and a drain electrode 06 and a source elec...

AI Technical Summary

Problems solved by technology

[0004] According to the above, due to the limitation of the manufacturing process, the channel length is at least 15um, resulting in a long channel length of the thin film transistor and low working efficiency.

Images