Laminated wafer processing method and adhesive piece

Abstract

The invention provides a laminated wafer processing method and an adhesive piece. In a plurality of chip laminated wafers stacked on wafers, in a state of adhering chip sides on the adhesive piece, wafers can also be reliably cut into a plurality of laminated chips. A paste layer (22) of an adhesive piece (2) correspondingly forms projections (3) on the peripheral residual area (1B) of a paste layer (22) and a laminated wafer (1) is adhered to a chip (15) of the laminated wafer (1); the projections (3) and the peripheral residual area (1B) are correspondingly adhered on the surface (10a) of a wafer (10); the peripheral residual area (1B) of the wafer (10) is supported through the projections (3). In the state, a cutting start point (modified layer 10c) of the wafer (10) is formed along a cutting predetermined line (11), and the wafer (10) is applied with outer force through the expansion of the adhesive piece (2), and accordingly, a laminated chip (1c) on the outmost side can be cut the same as other laminated chips (1c).

Description

technical field [0001] The present invention relates to a method of processing a laminated wafer in which a plurality of chips are arranged on the wafer, and an adhesive sheet suitable for use in the processing method. Background technique [0002] As one of the methods for integrating multiple semiconductor devices into one package, three-dimensional mounting such as CoW (Chip on Wafer: chip on wafer) in which multiple semiconductor device chips are stacked and mounted in three-dimensional directions is known of. CoW forms a stacked chip in which chips are stacked on a chip by dividing a stacked wafer in which chips are stacked on a wafer for individual chips (see Patent Document 1). [0003] On the other hand, in order to divide such a wafer, dicing by machining is generally performed in which a cutting blade of a cutting device penetrates into the wafer (see Patent Document 2). In addition, in recent years, after forming a modified layer inside the wafer by irradiation ...

AI Technical Summary

Problems solved by technology

However, in the stacked wafer, since the chip is not stacked on the outer peripheral portion, there is a step difference between the chip region and the outer peripheral portion on the interposer wafer side, so when the adhesive sheet is pasted on the chip side, the A phenomenon in which the outer peripheral portion of the interposer wafer is deflected toward the adhesive sheet side

[0010] In this way, when warping occurs in the outer peripheral portion of the interposer wafer, there arises a problem that, when the above-mentioned dividing starting point is formed and divided on the interposer wafer, the gap between the chip region and the outer peripheral portion cannot be properly aligned due to the amount of warping. The boundary portion forms the starting point of the split

For example, when the starting point of division is a modified layer obtained by irradiation with a laser beam, the focused point deviates and the modified layer cannot be formed. In addition, when the starting point of division is a groove obtained by laser processing or cutting, the depth of the groove will not be enough

In addition, even if a starting point for division is formed, in the wafer division method based on the expansion of the adhesive sheet described in Patent Document 4, the adhesive sheet cannot be sufficiently pasted on the outer peripheral portion of the interposer wafer due to the above-mentioned step difference. , at the boundary between the chip area and the outer periphery, the external force generated by the expansion is difficult to be transmitted to the boundary, and the stacked chips at the outermost periphery cannot be divided.

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