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Digital phosphor oscilloscope random sampling phase scrambling circuit design method

A technology of random sampling and circuit design, applied in the direction of digital variable display, etc., can solve the problems of weakening randomness of trigger point and sampling time, increasing the equivalent sampling time of one time, reducing the waveform update rate of data acquisition system, etc., and achieving precise phase control. Effect

Inactive Publication Date: 2014-08-27
JIANGSU LVYANG ELECTRONICS INSTR GROUP
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  • Application Information

AI Technical Summary

Problems solved by technology

However, in practical applications, it can be found that as the frequency of the input signal increases, the randomness between the trigger point and the sampling time is weakened, which directly leads to an increase in the equivalent sampling time and reduces the waveform update rate of the data acquisition system.

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  • Digital phosphor oscilloscope random sampling phase scrambling circuit design method
  • Digital phosphor oscilloscope random sampling phase scrambling circuit design method
  • Digital phosphor oscilloscope random sampling phase scrambling circuit design method

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Embodiment Construction

[0020] The digital phosphor oscilloscope random sampling spoiler circuit design method of the present invention comprises the following steps:

[0021] (1) The signal to be tested is used as the trigger source. When the signal level rises above the rising edge trigger level or the signal level drops below the falling edge trigger level, the trigger circuit generates a trigger pulse, which activates the data acquisition circuit, and Sampling is performed under the action of the sampling clock to obtain the value of the signal at a certain moment, and the position of the sampling sequence in the signal waveform can be determined by measuring the phase difference between the starting point of each ADC sampling sequence and the signal triggering moment;

[0022] (2) Since the sampling clock and the signal are independent of each other, the phase difference will be a random value, and the sampling value and the phase difference value will be stored at the same time, arranged in orde...

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Abstract

The invention belongs to the field of electronic measurement instruments. A digital phosphor oscilloscope random sampling phase scrambling circuit design method of the invention comprises the following steps: (1) a to-be-measured signal is used as a trigger source, a trigger circuit produces a trigger pulse when the signal level rises to exceed a rising edge trigger level or the signal level falls to be below a falling edge trigger level, the pulse activates a data acquisition circuit, and sampling is performed once under action of a sampling clock to obtain the value of a signal at a specific moment; and (2) the phase difference is a random value as the sampling clock and the signal are independent of each other, the sampling value and the phase difference value are stored at the same time, ranking is performed in order of phase difference, and all possible waveform sampling processes can be traversed when the number of superposition times is large enough, thus reconstructing the complete sampling waveform of a target signal. Accurate phase control on any position within a clock cycle is realized. The method is very suitable for sequential fine-tuning applications and plays a very critical role in setting and keeping timing alignment.

Description

technical field [0001] The invention belongs to the field of electronic measuring instruments, in particular to a method for realizing a random sampling phase spoiler circuit of a digital fluorescent oscilloscope. Background technique [0002] In high-speed data acquisition systems, the ability of real-time sampling to capture signals is limited by the highest sampling rate of the A / D. According to the Nyquist sampling theorem, if the highest frequency of the input signal is fs, then the system sampling rate fc must meet the conditions of waveform reconstruction, that is, fc≥2fs. In order to meet the needs of the actual acquisition system, generally fc≥5fs should be satisfied. It can be seen that as the frequency of the input signal increases, the requirements for the A / D converter are also more stringent. [0003] The random sampling system reorders the data sampled in different periods of the signal by sampling the periodic signal multiple times to realize the reconstruct...

Claims

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Application Information

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IPC IPC(8): G01R13/02
Inventor 吕华平
Owner JIANGSU LVYANG ELECTRONICS INSTR GROUP
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