Configuration information cache device in coarseness reconfigurable system and compression method

Abstract

The invention discloses a configuration information cache device in a coarseness reconfigurable system. The storage utilization rate of the configuration information cache device is high. The configuration information cache device is characterized by comprising a configuration information input interface, a configuration information output interface, a configuration information storage unit, a configuration information lookup table and a configuration information analysis module. The configuration information lookup table is used for marking all index numbers corresponding to a configuration information core cached in a configuration information cache at present. The configuration information analysis module is used for analyzing the index numbers of the configuration information core in a configuration information group, and judging whether the index numbers exist in the lookup table in the current configuration information cache. The configuration information core and the configuration information group serve as the basic operation unit of the storage and the basic operation unit of the access of the configuration information cache respectively. The invention further provides a corresponding compression storage method. Only one of repeated configuration information cores is reserved in the configuration information cache, the storage redundancy of the configuration information is eliminated, and accordingly the storage utilization rate of the configuration information cache is improved.

Description

technical field [0001] The invention relates to the field of embedded reconfigurable design, in particular to a configuration information caching device and a configuration information compression method with high storage utilization in a coarse-grained reconfigurable system. Background technique [0002] Today's market has increasingly stringent requirements on embedded terminal performance, power consumption, flexibility, integration and cost. Whether it is the hardware execution method represented by the application-specific integrated circuit (ASIC) or the software execution method based on the general-purpose processor (GPP), it is difficult to meet the above requirements. Although ASIC has high energy efficiency, it is designed for a specific application or a certain characteristic algorithm, and its low flexibility is difficult to meet the application requirements of various levels and cannot be popularized; although GPP has a strong flexible idea, but The instructio...

AI Technical Summary

Problems solved by technology

Although the traditional configuration information compression method can reduce the storage overhead of the configuration information cache, in the process of storing and reading the configuration information, it is necessary to dynamically compress and decompress the configuration information, which will introduce additional access delays for accessing the configuration information cache. Thereby seriously reducing the dynamic reconfiguration performance of the reconfigurable system

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