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Four-channel high-capacity waveform storage system and construction method thereof

A waveform storage, large-capacity technology, applied in general control systems, control/adjustment systems, recording/reproducing/deleting methods, etc., can solve problems such as oscilloscopes being unsuitable

Active Publication Date: 2014-02-26
杭州雷世科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, when encountering situations that are not suitable for human manual operation (such as narrow space, high temperature, etc.), it is not suitable to use an oscilloscope

Method used

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  • Four-channel high-capacity waveform storage system and construction method thereof
  • Four-channel high-capacity waveform storage system and construction method thereof
  • Four-channel high-capacity waveform storage system and construction method thereof

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Embodiment Construction

[0068] specific implementation

[0069] (one sight figure 1 The present invention is a four-channel large-capacity waveform storage system, which comprises: FPGA core chip, FPGA core chip minimum peripheral circuit, ADC (Analog Digital Coverter analog-to-digital conversion) sampling chip, Flash array, network port circuit, and power supply chip. See Figure 13 , the positional connection relationship and signal direction between them are: the power chips 9A, 9B, 9C, and 9D convert the 5V power supply voltage into 3.3V, 1.8V, 1.0V, and 2.5V, respectively, for other modules to use. Among them, the FPGA core chip Need to use 1.0V core voltage and 3.3V, 1.8V, 2.5V pin voltage, program loading Flash needs 3.3V voltage and 1.8V voltage, Flash array needs 3.3V, 1.8V, 2.5V voltage, ADC sampling chip 3.3V voltage is required, and the network card chip needs 1.0V and 2.5V voltage; after normal power-on, the FPGA core chip controls the 4-channel ADC sampling chip to collect waveform da...

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Abstract

A four-channel high-capacity waveform storage system comprises an FPGA core chip, an FPGA core chip minimum peripheral circuit, ADC sampling chips, a Flash array, an internet port circuit and a power supply chip. 9A, 9B, 9C and 9D in the power supply chip convert a 5V power voltage into a 3.3V voltage, a 1.8V voltage, a 1.0V voltage and a 2.5V voltage respectively for other modules to use; after being normally powered on, the FPGA core chip controls the four paths of ADC sampling chips to collect waveform data from an external input interface and transmits the data to the Flash array; after storage, the FPGA core chip controls the internet port circuit to transmit the data in the Flash array to an upper computer through an internet port; all control instructions are transmitted to the FPGA core chip by the upper computer through a network interface. A construction method of the four-channel high-capacity waveform storage system includes seven steps. According to the four-channel high-capacity waveform storage system and the construction method, multiple paths of waveform data can be integrally and simultaneously collected, and implementation is simple; the logical functions are all written in a VHDL and easy to modify; the four-channel high-capacity waveform storage system is small in size and can be conveniently applied to multiple systems.

Description

technical field [0001] The invention relates to a four-channel large-capacity waveform storage system and a construction method thereof, which are hardware implementation and software debugging based on FPGA of Xilinx Company, and belong to the technical field of digital signal processing. Background technique [0002] Flash is a type of memory chip, and the data in it can be modified through a specific program. Flash memory, also known as flash memory, combines the strengths of Rom and Ram, not only has the performance of electronically erasable and programmable (EEPROM), but also can quickly read data (the advantage of NVRAM), so that data will not be lost due to power failure . [0003] At present, there are two main types of Flash, NORFlash and NANDFlash. NANDFlash does not use the random read technology of memory. Its reading is carried out in the form of reading one block at a time, usually 512 bytes at a time. This technology cannot directly run the code on NANDFlas...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G05B19/042G11B20/02G01R13/02
Inventor 张玉玺麦超云杨彬樊文贵王俊
Owner 杭州雷世科技有限公司
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