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Method of silicon substrate III-V group nanowire area selection transverse epitaxial growth

A lateral epitaxial growth, III-V technology, applied in nanotechnology, electrical components, semiconductor/solid-state device manufacturing, etc., can solve problems affecting the electrical properties of nanowires, growth equipment cavity pollution, etc., and achieve dislocation-free growth. , low surface free energy, low cost effect

Inactive Publication Date: 2013-10-09
INST OF SEMICONDUCTORS - CHINESE ACAD OF SCI
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Problems solved by technology

[0004] However, although the Au particle catalyst can control the growth rate and size of the nanowires, the molten Au droplets will form deep energy levels inside the III-V nanowire materials and migrate on the surface, thus greatly affecting the electrical properties of the nanowires.
At the same time, Au particles cause certain pollution to the chamber of the growth equipment

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Embodiment Construction

[0024] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be described in further detail below in conjunction with specific embodiments and with reference to the accompanying drawings.

[0025] It should be noted that, in the drawings or descriptions of the specification, similar or identical parts all use the same figure numbers. Implementations not shown or described in the accompanying drawings are forms known to those of ordinary skill in the art. Additionally, while illustrations of parameters including particular values ​​may be provided herein, it should be understood that the parameters need not be exactly equal to the corresponding values, but rather may approximate the corresponding values ​​within acceptable error margins or design constraints. In addition, the directional terms mentioned in the following embodiments, such as "upper", "lower", "front", "rear", "left", "right", etc., are only re...

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Abstract

The invention provides a method of silicon substrate III-V group nanowire area selection transverse epitaxial growth. The method comprises the steps of A, preparing the whole segment of silicon nanowire on a top silicon thin layer of a crystal face SOI substrate (110); B, removing the middle segment of the whole segment of silicon nanowire, and forming silicon crystal faces (111) on the end faces, facing the inner sides, of the reserved left segment of silicon nanowire and the right segment of silicon nanowire; C, transversely growing III-V group material nanowires between the two end faces, provided with the silicon crystal faces (111) and facing the inner side, of the left segment of silicon nanowire and the right segment of silicon nanowire in an area selection mode, and forming a heterojunction bridging structure. The characteristics that the silicon crystal faces (111) have the higher dangling bond density and the lower surface free energy are utilized by the method, and the area selection transverse growth of the III-V group nanowires can be achieved on the side walls of the silicon crystal faces (111) between the left segment of silicon nanowire and the right segment of silicon nanowire with the low cost.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for selective lateral epitaxial growth of silicon-based III-V nanowires. Background technique [0002] III-V materials not only have extremely outstanding photoelectric properties, but also have obvious advantages in carrier mobility. Compared with pure silicon, the carrier mobility of GaAs material is about 8 times higher than that of pure silicon, the carrier mobility of InGaAs material is about 13 times higher, and the carrier mobility of InAs material can be as high as about 33 times. InSb The carrier mobility of compound materials can reach more than 50 times. Among them, the surface conduction band of the InGaAs material has a pinning energy level, so that a layer of two-dimensional electron gas is formed on the surface, and InGaAs with a small band gap can form a heterojunction contact with a silicon material with very good electron transmittance. Integra...

Claims

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Application Information

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IPC IPC(8): H01L21/205B82Y40/00
Inventor 韩伟华杨晓光杨涛王昊洪文婷杨富华
Owner INST OF SEMICONDUCTORS - CHINESE ACAD OF SCI
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