Storage unit of flash memory and forming method

Abstract

A flash memory storage unit and a forming method, wherein a flash memory storage unit includes: a semiconductor substrate, the semiconductor substrate includes an array area and a step area, the step area is on both sides of the array area; An isolation layer, a bottom selection gate and a bottom dielectric layer on the bottom surface; a control gate layer located on the surface of the bottom dielectric layer, the control gate layer also includes: several polysilicon layers and several interlayer dielectrics located on the surface of each polysilicon layer layer; a memory plug array with a thickness of the control gate layer that runs through the array area; several layers of polysilicon layers located in the control gate layer in the step area, decreasing layer by layer from the bottom to the top to form a ladder, each level of the ladder The projection arrangement of the steps on the semiconductor substrate is linear, and the linear shape is parallel to the boundary between the array area and the step area. The storage unit of the flash memory provided by the embodiment of the present invention improves the bit density of the flash memory and reduces the bit cost.

Description

technical field [0001] The invention relates to a semiconductor device and a forming method thereof, in particular to a storage unit of a flash memory and a forming method thereof. Background technique [0002] In recent years, the development of flash memory (flash memory) is particularly rapid. The main feature of flash memory is that it can keep stored information for a long time without power on; and it has the advantages of high integration, fast access speed, easy erasing and rewriting, etc., so it has been widely used in many fields such as microcomputer and automatic control. a wide range of applications. [0003] In order to further increase the bit density of flash memory and reduce the bit cost (bitcost), a low-cost three-dimensional stacked structure (Bit-CostScalable, referred to as BiCS) technology of flash memory has been further developed, please refer to figure 1 , is a schematic cross-sectional structure diagram of a memory cell of an existing flash memor...

AI Technical Summary

Problems solved by technology

[0010] However, there is a waste of space in the BiCS structure of the existing flash memory, resulting in a decrease in the bit density of the flash memory, an increase in the volume of the flash memory device, and a corresponding reduction in the bit cost. The manufacturing cost required for the storage space is a feature that reflects the cost of the storage device

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