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A fully self-aligned insulated gate bipolar transistor device and its manufacturing method

A bipolar transistor, self-aligned technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as unreasonable device structure, hidden dangers of devices, affecting device operating parameters and reliability, etc., and achieve process steps Reduced, increased steps, effects of latch-up improvement

Active Publication Date: 2016-09-21
中国东方电气集团有限公司 +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0013] In terms of production process, the existing technology adopts multiple photolithography and etching processes. Due to the problem of alignment accuracy in the photolithography machine itself, the width W of the window layer between the polycrystalline grids can only be limited to the width of the photolithography machine. Within the width that the precision can achieve, if the width W of the device window layer is further reduced, many hidden dangers will be brought to the device, and the device structure will be unreasonable, which will affect the working parameters and reliability of the device.

Method used

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  • A fully self-aligned insulated gate bipolar transistor device and its manufacturing method
  • A fully self-aligned insulated gate bipolar transistor device and its manufacturing method
  • A fully self-aligned insulated gate bipolar transistor device and its manufacturing method

Examples

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Effect test

Embodiment 1

[0069] like figure 1 As shown, it is a fully self-aligned insulated gate bipolar transistor device, including a first conductivity type substrate 110, a second conductivity type base region 120 is disposed in the first main surface of the first conductivity type substrate 110, A second conductivity type deep diffusion region 130 is provided in the second conductivity type base region 120, and the second conductivity type deep diffusion region 130 is in a “concave” shape. region 140, the emitter region 140 of the first conductivity type is respectively arranged on the two convex parts of the "concave" type of the deep diffusion region 130 of the second conductivity type, and a grid is arranged on the first main surface of each emitter region 140 of the first conductivity type Pole insulating layer 160, a polysilicon gate layer 170 is provided on the gate insulating layer 160, a second insulating layer 180 is provided on the polysilicon gate layer 170, insulating sidewalls 190 ...

Embodiment 2

[0099] like figure 1 As shown, it is a fully self-aligned insulated gate bipolar transistor device, including a first conductivity type substrate 110, and a second conductivity type base region 120 is arranged in the first main surface of the first conductivity type substrate 110, The second conductivity type base region 120 is provided with a second conductivity type deep diffusion region 130, the second conductivity type deep diffusion region 130 is in a "concave" shape, and the second conductivity type base region 120 is provided with a first conductivity type emitter Region 140, the first conductivity type emitter region 140 is respectively disposed on the two convex portions of the "concave" type of the second conductivity type deep diffusion region 130, and a gate is provided on the first main surface of each first conductivity type emitter region 140 The polar insulating layer 160, the gate insulating layer 160 is provided with a polysilicon gate layer 170, the polysil...

Embodiment 3

[0101] like figure 1 As shown, it is a fully self-aligned insulated gate bipolar transistor device, including a first conductivity type substrate 110, and a second conductivity type base region 120 is arranged in the first main surface of the first conductivity type substrate 110, The second conductivity type base region 120 is provided with a second conductivity type deep diffusion region 130, the second conductivity type deep diffusion region 130 is in a "concave" shape, and the second conductivity type base region 120 is provided with a first conductivity type emitter Region 140, the first conductivity type emitter region 140 is respectively disposed on the two convex portions of the "concave" type of the second conductivity type deep diffusion region 130, and a gate is provided on the first main surface of each first conductivity type emitter region 140 The polar insulating layer 160, the gate insulating layer 160 is provided with a polysilicon gate layer 170, the polysil...

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Abstract

The invention relates to a semiconductor device in the field of power electronics, and in particular relates to a full-self-aligned insulated gate bipolar transistor device and a manufacturing method thereof. The device comprises a first conduction type substrate, and is characterized in that a second conduction type base region is formed in a first primary plane of the first conduction type substrate; and a second conduction type deep diffusion region is formed in the second conduction type base region and is in the shape of a Chinese character 'ao' meaning concave. The bipolar transistor device adopts insulated side walls and a technology of full self alignment, photolithography is not needed, the width of a polysilicon window can be reduced to 4 microns and even 2 microns, and thus more refined patterns can be achieved.

Description

technical field [0001] The semiconductor device of the present invention relates to the technical field of power electronics, specifically a fully self-aligned insulated gate bipolar transistor device and a manufacturing method thereof. Background technique [0002] The existing insulated gate bipolar transistor IGBT is mainly composed of N-drift region, P body region, deep P+ region, N+ emitter region, P+ collector region, SiO2 gate oxide layer, polysilicon gate layer, SiO2 oxide layer (including SiO2 layer, PSG phosphosilicate glass layer, SiO2 layer), front metal layer and back metal layer. The front metal layer is in contact with the P body region and the N+ emitter region at the same time, forming the emitter of the device. The backside metal contacts the P+ collector region, which constitutes the collector of the device. The polysilicon gate together with the attached metal forms the device gate. [0003] like figure 2 As shown, the IGBT device can be divided into ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/331
Inventor 张世勇胡强樱井建弥
Owner 中国东方电气集团有限公司
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