Submission method of descriptor of network interface card (NIC) based on mixing of PIO (process input output) and DMA (direct memory access)

Abstract

The invention discloses a submission method of a descriptor of an NIC based on mixing of PIO and DMA. The implementation steps are as follows: 1) a hardware transmit queue is built in an NIC, and a main store transmit queue is built in a main store; 2) a descriptor is initialized; and 3) a consumer process accesses the NIC directly to write the descriptor into the hardware transmit queue directly in a PIO manner, or the descriptor is submitted to the main transmit queue, while door-bell data is written into the hardware transmit queue; when the NIC processes the data of the hardware transmit queue sequentially, current data type is judged, if the current data is the descriptor, and read-back processing is performed from the hardware transmit queue according to the value of a length field; and if the current data is the door-bell data, the current data is retaken and then processed from the main store transmit queue, and a process that the NIC implements the DMA to read a next descriptor and a process of processing the current descriptor are overlapped. The submission method has the advantages that the message start delay is small, the capacity of the transmit queue is large, and data are processed simply and efficiently.

Description

technical field [0001] The invention relates to the field of high-speed interconnection network of high-performance computers, in particular to a PIO- and DMA-based network interface card descriptor submission method. Background technique [0002] A high-performance computer is connected to a large number of main processor nodes (hereinafter referred to as nodes), such as computing nodes, storage nodes, and dedicated processing nodes. Any of these nodes can be used as an end node, which is defined herein as a device in a high-performance computer that produces or ultimately consumes messages. Each node includes a network interface card (NIC) that connects the node to a high-speed interconnection network. The NIC is connected to the node by a general I / O bus such as a PCIE bus. [0003] The user process of the node interacts with the NIC through the port to complete various user-level communication operations. Ports send and receive messages using queue pairs. Each queue ...

AI Technical Summary

Problems solved by technology

Due to the limitation of hardware resources, the capacity of the hardware send queue is limited, for example, it is fixed to be able to receive 512 8-byte data, which may cause a problem: when the hardware send queue is full and the user process still needs descriptors When writing, the user process needs to query the status of the hardware send queue to determine whether new descriptor data can be written to the hardware send queue

[0024] As mentioned above, the DMA method submits the descriptor to increase the startup overhead, and the advantage is that the capacity is large; the PIO method submits the descriptor to obtain a lower startup overhead, but the disadvantage is that the capacity is small, and it will become a transmission bottleneck in some application backgrounds.

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