Inter-core communication method realizing data packet zero-copying based on pipelining mode

Abstract

The invention discloses an inter-core communication method realizing data packet zero-copying based on a pipelining mode. The method is used in cores of a universal multi-core platform; the inter-core communication is carried out in a mode that the cores of the multi-core platform are used as manufacturers or customers in accordance with the pipelining mode; the method is characterized by comprising the following steps: a pair of independent packet buffer area queues with the same length are arranged between two adjacent cores at each pipeline during the inter-core communication; empty and full buffer areas between the cores as the manufacturers and the cores as the customers are exchanged through the packet buffer area array; the cores as the manufactures insert the full buffer areas into locating queues of the packet buffer area queues, and the cores as the manufacturers insert reclaimed empty buffer areas into reclaiming queues of the packet buffer area queues; and each time the cores as the manufactures insert one full buffer area to the locating queue, the cores as the manufactures take one empty buffer area from the reclaiming queues and filling the empty buffer area into a packet buffer are ring of the full buffer area. With the adoption of the method, the packet memory management problem in the high speed network packet processing for realizing zero copying under a pipelining parallel mode is solved effectively; and the packet cache management process in each single pipeline is realized through the exchange mechanism.

Description

technical field [0001] The invention belongs to the technical field of inter-core communication of a multi-core platform, and in particular relates to an inter-core communication method based on a zero-copy data packet in a pipeline mode. Background technique [0002] Network equipment has always been faced with the problem of incompatibility between flexibility and high performance. The emergence of general-purpose multi-core processors provides a feasible solution to this problem. The powerful computing capabilities of multi-core processors make it possible to use software to obtain high performance. In addition, the familiar development platform and abundant third-party software resources also make this solution very attractive. [0003] Pipelining mode is one of the parallel processing technologies adopted by network systems based on general multi-core platforms. It divides the processing of data packets into several stages, and each stage is mapped to a different phys...

AI Technical Summary

Problems solved by technology

This method requires a large amount of memory space, and increases rapidly with the increase of network traffic

In addition, netmap adopts the swap mechanism to solve the problem of data cache area management in packet forwarding under zero copy, which is manifested as the mutual exchange process of the source packet buffer and the destination packet buffer, but its performance depends to a certain extent on the network card hardware Buffer, and the performance of the one-way (non-packet forwarding, receiving, and sending two-way structure) structure is limited

Therefore, under the above-mentioned basic pipeline parallel structure, it is still a challenge to solve the packet memory management pressure faced by the high-speed network, so the present invention comes from

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