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Design method of positive-definite Hermite matrix Cholesky decomposition high-speed systolic array

A technology of systolic array and design method, which is applied in the field of decomposition of positive definite Hermite matrix, can solve the problem of low parallel processing speed of dimensional hardware, achieve the effect of improving calculation accuracy, expanding the scope of application, and improving data processing efficiency

Inactive Publication Date: 2015-02-18
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Application Information

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Problems solved by technology

[0004] The purpose of the present invention is to overcome the defects that the hardware design directly written by the Cholesky decomposition formula is not suitable for matrices with large dimensions, and the hardware parallel processing speed is not high, and provides a Cholesky decomposition involving a positive definite Hermite matrix of M×M dimensions Design Method of High Speed ​​Systolic Array

Method used

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  • Design method of positive-definite Hermite matrix Cholesky decomposition high-speed systolic array
  • Design method of positive-definite Hermite matrix Cholesky decomposition high-speed systolic array
  • Design method of positive-definite Hermite matrix Cholesky decomposition high-speed systolic array

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Embodiment

[0040] In this embodiment, Matlab is used to simulate the Cholesky decomposition of the systolic array to realize the decomposition of the positive definite Hermite matrix.

[0041] The positive definite Hermite matrix A is a 4×4 dimensional matrix, by the nature of the Hermite matrix: A=A H , the elements of the matrix Express A as:

[0042] A = a 11 a 21 * a 31 * a 41 * a 21 a 22 ...

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Abstract

The invention discloses a design method of a positive-definite Hermite matrix Cholesky decomposition high-speed systolic array. The design method is characterized in that a processing unit is classified into a circular processing unit and a square processing unit, the processing units of different types are functionally classified, so that the design of the hardware is ensured to have regularity, and the parallelization flow processing of the data is realized. The design method is suitable for the Cholesky decomposition of all positive-definite Hermite matrixes with the dimensions of M*M and has universality and wide application range.

Description

technical field [0001] The invention relates to a method for decomposing a positive definite Hermite matrix, in particular to a method for Cholesky decomposing a pulsation array of a positive definite Hermite matrix. Background technique [0002] In the fields of scientific computing and engineering, Cholesky decomposition is a very important linear algebra method. Especially in the third-generation mobile communication TD-SCDMA system, multiple joint detection algorithms all involve the inversion of the system matrix A. When inverting the matrix A, the matrix A must be decomposed first. When the user compares When there are many antennas and there are many receiving antennas, the amount of calculation for decomposing the matrix A will be relatively large and the complexity will be relatively high. Cholesky decomposition utilizes the properties of the Hermite matrix to effectively reduce the computational complexity when decomposing the matrix A. [0003] Most of the metho...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F17/16
Inventor 贺江何春莫明威李玉柏
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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