Instruction set batch testing device and method for processor

Abstract

The invention discloses an instruction set batch testing device and method for a processor. The instruction set batch testing device comprises a test case batch management device, a source file compiling device, a configuration file parsing device and a debugging device, wherein the test case batch management device is respectively connected with the configuration file parsing device and the source file compiling device, and the configuration file parsing device is connected with the source file compiling device and respectively connected with the test case batch management device and the debugging device. According to the instruction set batch testing device disclosed by the invention, the configuration file parsing device is utilized for generating an automatic test script, so that a great deal of testing work can be automatically implemented, a test result can be given out, and a user can be free of the complexity in compiling the test script and the inconvenience in manual observation of instruction behavior; and by constructing the test case batch management device for performing effective organization, management and maintenance on a test case library, a test implementation plan can be fast and accurately made, the user can complete the verification of the functions of the processor with high efficiency, and the test result is comprehensive and accurate.

Description

technical field [0001] The invention belongs to the technical field of processors, and in particular relates to a testing device and method for processors, in particular to a batch testing device and method for instruction sets of processors. Background technique [0002] In the development process of the processor, it is very crucial to test its function accurately and rigorously, and the testing work runs through each stage of the processor development. In incremental and rapid iterative development, successive releases of new versions make testing tasks more frequent. Existing test devices and methods need to manually execute each test case one by one, so its efficiency is low, which seriously hinders the overall progress of processor development, and the execution of test cases is easily missed by manual methods, resulting in incomplete testing. Completely, it leads to the accumulation and expansion of the processor's own problems, resulting in large-scale rework in the...

AI Technical Summary

Problems solved by technology

Existing test devices and methods need to manually execute each test case one by one, so its efficiency is low, which seriously hinders the overall progress of processor development, and the execution of test cases is easily missed by manual methods, resulting in incomplete testing. Completely, leading to the accumulation and expansion of the processor's own problems, resulting in large-scale rework in the later stage of development

[0003] There are several problems in the existing instruction set testing technology for processors: on the one hand, the well-written test cases are used to observe the behavior of the instructions on the graphical interface, and to analyze whether the hardware involved in the operation works in the expected mode one by one The workload is huge, there are many repetitive tasks, and it is not convenient for large-scale verification; on the other hand, the processor instruction set requires cross-validation, and they are closely related and complex, and the amount of code is even greater. If you want to test them completely, Even if 100% coverage is not guaranteed, a large number of test cases are required, so it is not practical to write test scripts manually; moreover, it is not a good strategy to automatically test all use cases, especially when the processor system changes frequently , When new versions are released one after another, if all use cases are tested frequently, although the reliability of the system can be guaranteed, time loss is not allowed

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