Multiple input-multiple clock maintenance obstruction type JK trigger
A multi-input, blocking technology, applied in the electronic field, can solve problems such as inconvenient design, clock load current, power consumption, electromagnetic radiation interference, etc., and achieve the effect of fast storage speed and simple data selection circuit
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[0017] figure 1 It is an embodiment of the present invention, a circuit schematic diagram of a 3-input-3 clock maintaining blocking JK flip-flop, the flip-flop has three sets of data inputs (j1, k1), (j2, k2), (j3, k3), corresponding The three clocks are cp1, cp2, and cp3 respectively, and the output terminals are q and nq, and nq and q are logically complementary.
[0018] The 3-input-3 clock maintaining blocking JK flip-flop includes a multi-input basic RS latch, 3 input units and 3 JK conversion circuits. Wherein the NAND gates I20, I21, I22, I25 form the first input unit, the NAND gates I17, I18, I19, I24 form the second input unit, and the NAND gates I14, I15, I16, I23 form the third input unit; or Gate I30, AND gate I35, I36 and NAND gate I38 form the first JK conversion circuit, OR gate I29, AND gate I33, I34 and NAND gate I37 form the second JK conversion circuit, OR gate I28, AND gate I31, I32 The NAND gate I39 forms the third JK conversion circuit.
[0019] The ou...
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