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Polycrystalline Si1-xGex/metal parallel covering double-gate strained SiGe-on-insulator (SSGOI) n metal oxide semiconductor field effect transistor (MOSFET) device structure

A technology of device structure and double-gate structure, applied in semiconductor devices, electrical components, circuits, etc., can solve problems such as growth, low thermal conductivity, and self-heating

Inactive Publication Date: 2011-10-05
XIDIAN UNIV
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The SSGOI device process is relatively simple, but it needs to grow a relaxed SiGe virtual substrate, and its thermal conductivity is relatively low
In addition, these SOI MOSFET devices are based on SiO 2 As an insulating buried oxide layer, it is also prone to self-heating effects

Method used

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  • Polycrystalline Si1-xGex/metal parallel covering double-gate strained SiGe-on-insulator (SSGOI) n metal oxide semiconductor field effect transistor (MOSFET) device structure
  • Polycrystalline Si1-xGex/metal parallel covering double-gate strained SiGe-on-insulator (SSGOI) n metal oxide semiconductor field effect transistor (MOSFET) device structure
  • Polycrystalline Si1-xGex/metal parallel covering double-gate strained SiGe-on-insulator (SSGOI) n metal oxide semiconductor field effect transistor (MOSFET) device structure

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Embodiment Construction

[0029] Such as figure 1 As shown, the novel polycrystalline Si of the present invention 1-x Ge x / Metal side-by-side covered double-gate stepped buried oxide SSGOI nMOS-FET device structure includes: polycrystalline Si 1-x Ge x / Metal parallel covering double gate structure 1; gate insulating layer 2; intrinsic (or p - doped) strained Si electron quantum well layer 3; p-doped relaxed Si 1-y Ge y buffer layer 4; stepped buried oxide layer 5; p - Doped single crystal Si(100) substrate 6, the p - Doped single crystal Si(100) substrate relaxes Si by p 1-y Ge y The buffer layer, the p-relaxation SiGe graded layer and the single crystal Si are composed of three parts (such as image 3 shown).

[0030] Polycrystalline Si 1-x Ge x / metal side-by-side covered double gate structure 1 including polysilicon 1-x Ge x gate and metal gate, and polysilicon 1-x Ge x The gate is completely covered by the metal gate, that is, polysilicon 1-x Ge x The gate is completely covere...

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Abstract

The invention discloses a polycrystalline Si1-xGex / metal parallel covering double-gate stepped buried oxide strained SiGe-on-insulator (SSGOI) n metal oxide semiconductor field effect transistor (MOSFET) device structure. In the technical scheme, the device structure consists of a polycrystalline Si1-xGex / metal parallel covering double-gate structure, a gate insulating layer, an intrinsic or p-doped strain Si electronic quantum well layer, a p-doped relaxation Si1-yGey buffer layer, a stepped buried oxide layer and a p-doped substrate from top to bottom, wherein the p-doped monocrystalline Si(100) substrate consists of three parts, namely a p-relaxation Si1-yGey buffer layer, a p-relaxation SiGe gradient layer and monocrystalline Si. The device structure is simple and completely compatible with the conventional Si silicon-on-insulator (SOI) process, and integrates the advantages of grid engineering, strain engineering and substrate engineering.

Description

technical field [0001] The invention relates to a semiconductor MOSFET device structure in the field of microelectronics, specifically a polycrystalline Si 1-x Ge x / Metal side by side covered double gate stepped buried oxide SSGOI nMOSFET device structure. Background technique [0002] Silicon-Based (Silicon-Based) MOSFET technology has entered the nanometer era, the channel length continues to decrease, the development of semiconductor devices is increasingly restricted by physical limits, and the demand for high-speed and high-performance devices is becoming stronger and stronger. Carrier mobility becomes an effective means. At present, many obstacles have been encountered in reducing the feature size of traditional silicon processes, and various secondary physical effects continue to appear. In order to continue the prediction of Moore's Law, the improvement of device structure and the introduction of new materials may play an important role in promoting the improveme...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L29/49H01L29/06
Inventor 宋建军王冠宇张鹤鸣胡辉勇宣荣喜周春宇
Owner XIDIAN UNIV
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