High-mobility group III-V semiconductor metal oxide semiconductor (MOS) interface structure

Abstract

The invention discloses a high-mobility group III-V semiconductor metal oxide semiconductor (MOS) interface structure, which comprises a monocrystalline substrate (101), a buffer layer (102) formed on the upper surface of the monocrystalline substrate (101), a quantum well bottom barrier layer (103) formed on the buffer layer (102), a high-mobility quantum well channel (104) formed on the quantumwell bottom barrier layer (103), a quantum well top barrier layer (105) formed on the high-mobility quantum well channel (104), an interface control layer (106) formed on the quantum well top barrierlayer (105), a high-K gate medium (107) formed on the interface control layer (106), and a metal gate structure (108) formed on the high-K gate medium (107) in turn from bottom to top. The structure realizes high carrier mobility and low interface state density simultaneously, and meets the requirement of a complementary metal oxide semiconductor (CMOS) technology on a high-performance group III-V semiconductor.

Description

technical field [0001] The invention relates to the technical field of semiconductor integrated circuit manufacturing, in particular to a MOS interface structure for realizing high mobility and low interface state density on III-V semiconductors, which is applied to high-performance III-V semiconductor CMOS technology. Background technique [0002] The existing silicon integrated circuit technology follows Moore's law to improve performance by reducing the feature size, which will inevitably bring about the complexity of process equipment and manufacturing technology, especially when semiconductor technology develops to the nanometer scale, silicon integrated circuit technology is increasingly approaching its theory Due to the dual limits of technology and technology, using high-mobility channel materials to improve the performance of silicon-based CMOS technology has become an important direction for the continuation of Moore's Law. The room temperature electron mobility of...

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Problems solved by technology

However, directly growing high-k gate dielectric materials directly on the surface of high-mobility channels will bring problems such as the decrease of channel carrier mobility, high interface state density, and the reliability of MOS interfaces.

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