Array substrate and manufacturing method thereof

Abstract

The invention relates an array substrate and a manufacturing method thereof. The array substrate comprises an underlayer substrate; a plurality of data lines and grate scanning lines are transversely and longitudinally crossed on the underlayer substrate to encircle to form pixel units arrayed in a matrix form; TFT (Thin Film Transistor) switches and pixel electrodes are formed in the pixel units; the array substrate also comprise data join lines and grating join lines; and the data join lines are mutually isolated, are formed on the same layer with the data lines, the grating scanning lines or the pixel electrodes, and are connected with all the data lines via data through holes in a first insulation layer; and the grating join lines are mutually isolated, are formed on the same layer with the data lines, the grating scanning lines or the pixel electrodes, and are connected with all the grating scanning lines via grating through holes in a second insulation layer. In the invention, by adopting the technical scheme that the grating scanning lines and the grating join lines, as well as the data lines and the data join lines are arranged at intervals on the same layer or different layers, the signal to noise ratio and the defect relevance ratio of detection signals are improved when defects of the grating scanning lines and the data lines are detected.

Description

technical field [0001] The invention relates to liquid crystal display testing technology, in particular to an array substrate with a testing circuit structure and a manufacturing method thereof. Background technique [0002] With the continuous improvement of thin film transistor liquid crystal display (Thin Film Transistor Liquid Crystal Display, hereinafter referred to as: TFT-LCD) manufacturing technology and the continuous reduction of cost, TFT-LCD has been widely used. The liquid crystal panel is the main display component in TFT-LCD, and is usually formed by pairing a color filter substrate and an array substrate. [0003] A typical structure of an array substrate includes a plurality of data lines and gate scanning lines crossing horizontally and vertically, surrounding pixel units arranged in a matrix. A TFT switch is formed in each pixel unit, and the data line and the pixel electrode are connected through the TFT switch. In order to ensure the normal display of...

AI Technical Summary

Problems solved by technology

[0006] However, during the research process of the present invention, the inventor found that the above-mentioned test process has the following problems: when a short circuit occurs between the two gate scan lines 3, such as Figure 4 As shown, since one end of each grid scanning line 3 has been connected by the grid connecting wire 6, the test signal emitted by the signal transmitter 21 can not only reach the second signal receiver 20 through the short circuit position, but also reach the second signal receiver 20 through the grid connecting wire 6. , thus causing interference to the reception of the second signal receiver 20, resulting in a decrease in the signal-to-noise ratio of the test signal, which affects the detection rate of short-circuit defects and the speed of equipment testing

Bad test for data line 2 has the same problem

Images