Embedded B-mode ultrasonic diagnostic device and signal processing method thereof
A technology of ultrasonic diagnosis and signal processing, which is applied in the direction of ultrasonic diagnosis, ultrasonic/sonic/infrasonic diagnosis, infrasonic diagnosis, etc. It can solve the problems of real-time performance, poor reliability and compatibility, crash, etc., and achieve good real-time performance, stable performance, Highly scalable effect
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Embodiment 1
[0027] An embodiment of an embedded B-type ultrasonic diagnostic device, see figure 1 , figure 2 and image 3 It includes a housing on which a display is installed, a power module, a signal acquisition and processing circuit are installed in the housing, and the power module provides ±80V, ±60V, 12V, ±5V power for the entire diagnostic equipment; the said Signal acquisition and processing circuit comprises 8-way A / D conversion circuit 1, FPGA chip 2 and ARM9 chip 3, FPGA chip is connected with dynamic memory, and described 8-way A / D conversion circuit receives the ultrasonic signal from probe 4, and described 8-way A / D conversion circuit The output of road A / D conversion circuit is connected to the data input port of FPGA chip, and the control port of described FPGA chip is connected with the control port of ARM9 chip, and the data port of ARM9 chip connects the data port of FPGA chip, and FPGA chip connects display 5.
[0028] The dynamic memory includes SDRAM memory 6 for...
Embodiment 2
[0034] An embodiment of an embedded B-type ultrasonic diagnostic signal processing method, referring to Embodiment 1, the processing method includes a signal acquisition and processing circuit, and the signal acquisition and processing circuit includes 8-way A / D conversion circuit 1, FPGA Chip 2 and ARM9 chip 3, the FPGA chip is connected with a dynamic memory, the 8-way A / D conversion circuit receives the ultrasonic signal from the probe 4, and the output of the 8-way A / D conversion circuit is connected to the data input port of the FPGA chip , the control port of the FPGA chip is connected with the control port of the ARM9 chip, the data port of the ARM9 chip is connected to the data port of the FPGA chip, and the FPGA chip is connected to the display 5, and the internal sequence connection of the FPGA chip is provided with a data receiving module 201, a variable aperture Control module 202, focus delay superposition module 203, DC blocking and noise reduction processing modu...
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