High-speed shadow memory control structure

Abstract

The invention relates to a high-speed shadow memory control structure, which comprises two memories which are mutual shadows. The high-speed shadow memory control structure has the main technical characteristics that the two memories are connected with a shadow memory controller through two groups of data buses, address buses and control signals respectively; the shadow memory controller is also connected with two main control chips through the other two groups of address data buses, address buses and control signals respectively; and a bus switching signal port of the shadow memory controller is connected with any one of the main control chips or other logic switching chip. The independent control functions of the main control chips to the shadow memories are achieved by adopting a fully parallel processing structure, the two main control chips have full read-write rights for the current accessed memory in an entire time range so as to improve the data access speed and read accuracy, and the high-speed shadow memory control structure has the characteristics of flexible control, convenient use and the like.

Description

technical field [0001] The invention belongs to the field of memory control, in particular to a high-speed shadow memory control structure. Background technique [0002] A digital signal processor (DSP for short) chip is a microprocessor specially used for digital signal processing. At present, the system integration of digital signal processor chips is getting higher and higher, the power consumption is getting smaller and smaller, the instruction system is getting more and more perfect, and the hardware execution speed is getting faster and faster. With the continuous improvement of the performance of the digital signal processor chip, the access speed of the memory has not been improved synchronously. Therefore, the access speed of the memory has become an important index to measure a data processing system. In data processing systems, shadow memory is often used. In traditional shadow memory, its ping-pong address space shares the memory chip and the data address bus. B...

AI Technical Summary

Problems solved by technology

In data processing systems, shadow memory is often used. In traditional shadow memory, its ping-pong address space shares the memory chip and the data address bus. Bus conflicts will inevitably occur during high-speed data transmission. Although bus arbitration mechanisms can be added to solve the problem The problem of bus conflict, but adding the bus arbitration mechanism will affect the speed of data transmission

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