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3D conduction structure and manufacturing method thereof

A technology of conducting structure and manufacturing method, which is applied in semiconductor/solid-state device manufacturing, semiconductor device, electric solid-state device and other directions, can solve the problems of easy hole expansion leakage current, large hole diameter at the end of channel 17, exposed chips, etc., and achieves shrinkage. Package volume, avoid inaccurate alignment, and shorten the effect of wire paths

Active Publication Date: 2011-04-20
IND TECH RES INST
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] However, during the second laser drilling to form the channel 17, it is very easy to expand the hole and cause the leakage current problem
When laser drilling to the welding pad 12, the metal material (i.e. welding pad 12) will reflect or refract the laser, and the insulating material 16 adjacent to the welding pad 12 will also be burned by the laser at the same time, resulting in a large hole at the end of the channel 17 or even exposure Chip out 10
When the conductive material 18 is refilled in the channel 17, the conductive material 18 will contact the chip 10, causing the conductive material 18 that must be insulated to be electrically connected to the chip 10, which is the so-called leakage current problem.

Method used

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  • 3D conduction structure and manufacturing method thereof
  • 3D conduction structure and manufacturing method thereof
  • 3D conduction structure and manufacturing method thereof

Examples

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no. 1 example

[0064] Please refer to Figure 2A-2J , which shows a manufacturing flow chart of the package with the three-dimensional conducting structure according to the first embodiment of the present invention. The manufacturing method of the package with the three-dimensional conducting structure of this embodiment includes the following steps. First, please refer to Figure 2A , providing a first substrate 110 , the first substrate 110 has an active surface 112 and a passive surface 114 opposite thereto, and the first substrate 110 has solder pads 116 located on the active surface 112 . The first substrate 110 is preferably an image sensor chip (CMOS Image Sensor, CIS), which receives images or light through the active surface 112 .

[0065] After that, a hole is drilled from the active surface 112 of the first substrate 110 to the passive surface 114, thereby forming a through hole 118. The through hole 118 can be arranged at any position of the first substrate 110, for example, it...

no. 2 example

[0082] The difference between this embodiment and the above-mentioned embodiments lies in the position of the through hole, the structure of the first redistributed conductor and its forming method. The rest of the same components and steps use the same reference numerals and will not be repeated here.

[0083] Please refer to FIGS. 4A-4E , which are schematic diagrams showing the manufacturing process of the package with the three-dimensional conducting structure according to the second embodiment of the present invention. Referring to FIG. 4A , the first substrate 110 has a solder pad 116 on its active surface 112 and has a through hole 218 . Next, a first redistribution conductor is formed on the active surface 112 of the first substrate 110 , and the steps are described as follows.

[0084] First, as shown in FIG. 4A , a conductive bump 228 is formed on the active surface 112 of the first substrate 110 , such as by electroplating or printing. The conductive bump 228 protr...

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Abstract

The invention discloses a 3D conduction structure for packages. The 3D conduction structure comprises a substrate, a first redistribution conductor, a second redistribution conductor and an insulation material. The substrate has an active surface and a passive surface which is relative to the active surface, and the substrate is provided with a welded gasket and a through hole, and the welded gasket is arranged on the active surface. The first redistribution conductor comprises a projection part and a bearing part, the projection part projects outwards from the active surface of the substrateand is electrically connected to the welded gasket; the bearing part is arranged outside the active surface and connected to the projection part, and the projection part and the bearing part form an accommodation space which is communicated with the through hole. The second redistribution conductor is arranged in the through hole and the accommodation space and in contact with the bearing part, and extends outwards from the bearing part to the passive surface. The insulation material is filled in the second redistribution conductor and the substrate as well as between the second redistribution conductor and the projection part.

Description

technical field [0001] The present invention relates to a conducting structure and a manufacturing method thereof, and in particular to a three-dimensional conducting structure and a manufacturing method thereof. Background technique [0002] Broadly speaking, System in Package (SiP) includes early multi-chip module (Multi-chip Module, MCM) technology, multi-chip packaging (Multi-chip Package, MCP) technology, chip stacking (Stack die ), PoP (Package on Package), PiP (Package in Package) and embedding active / passive components in the substrate (Embedded Substrate) and other technologies. In terms of structural appearance, MCM is a two-dimensional 2D structure, while MCP, chip stacking, PoP, PiP, etc. are three-dimensional 3D structures; because 3D structures can better meet the needs of miniaturization and high performance, so in recent years To be favored by the industry. [0003] In terms of interconnection technology (Interconnection), traditional 2D or 3D structures ar...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/48H01L27/146H01L21/60
CPCH01L24/19H01L2924/1461H01L2924/15788H01L2224/04105H01L2924/18162H01L2224/12105H01L2224/19H01L2224/32145H01L2224/24145H01L2224/73267H01L2224/92244H01L2924/00H01L2924/00012
Inventor 张香鈜张恕铭郭子荧李元章
Owner IND TECH RES INST
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