EOS tester of integrated LCAS simulation and VCG time delay simulation

A tester and simulation technology, applied in the direction of time division multiplexing system, digital transmission system, electrical components, etc., can solve the problems that the maximum differential delay cannot be realized, EOS tester is not found, etc., to meet the bandwidth requirements, The effect of restoring capacity

Inactive Publication Date: 2009-11-18
OPWILL TECH BEIJING
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Problems solved by technology

[0017] Since the connection method of the test platform is fixed, all members of the virtual concatenation group send at the same time, so all members arrive at the EOS device under test at the same time, so the function of testing the maximum differential delay of the virtual concatenation receiving side of the EOS device under test cannot be realized
[0018] In addition, there is no EOS tester that supports LCAS protocol simulation in China.

Method used

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  • EOS tester of integrated LCAS simulation and VCG time delay simulation
  • EOS tester of integrated LCAS simulation and VCG time delay simulation
  • EOS tester of integrated LCAS simulation and VCG time delay simulation

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Embodiment Construction

[0039] In order to make the purpose, technical solutions and advantages of the present invention clearer, the implementation of the present invention will be further described in detail below in conjunction with the accompanying drawings:

[0040] This embodiment provides an EOS tester integrating LCAS simulation and VCG delay simulation.

[0041] see image 3 , the user 38 is connected to the link adjustment mechanism LCAS simulation module 41 through the user interface 39 and the control unit 40, and the LCAS simulation module is connected to the EOS tester 30a. The EOS tester includes an Ethernet interface 31, which is connected to the EOS device 30 to be tested via Ethernet, and receives and sends Ethernet signals; the STM-N interface 37 is connected to the STM-N interface in the EOS to be tested, and is used to receive and send the STM-N Signal; processing unit, including SDH overhead processing module 36, VC mapping and demapping module 34 and GFP encapsulation and deca...

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Abstract

The invention discloses an EOS tester of integrated LCAS simulation and VCG time delay simulation, comprising an Ethernet interface, a STM-N interface, an Ethernet data generating and detection module and a processing unit; the EOS tester further comprises a virtual concatenation group VCG differential delay and detection module and a link regulatory mechanism LCAS simulation module, wherein the VCG differential delay and detection module is used for extracting multiple frame indicator MFI differences of each member in identical synchronous digital hierarchy (SDH) frame to obtain differential delays of all members; the LCAS simulation module is used for controlling the capacity of virtual concatenation group VCG link. The EOS tester can carry out delay control on each VC-x channel, so the received VCG members are with different MFI values, thus being capable of testing the differential delays of VCG; the capacity of VCG link can be increased or decreased without loss by the LCAS simulation module, thus satisfying the requirement of top businesses for bandwidth.

Description

technical field [0001] The invention relates to an EOS tester, in particular to an EOS tester integrating LCAS simulation and VCG delay simulation. Background technique [0002] Multi-service transport platform MSTP (Multi-Service Transport Platform) refers to the synchronous digital series SDH (Synchronous Digital Hierarchy) technology, while realizing time division multiplexing TDM (Time Division Multiplexing), asynchronous transfer mode ATM (Asynchronous Transfer Mode), Ethernet Access, processing, and transmission of services such as the Internet, and provide a multi-service node with unified network management. [0003] Ethernet business data has the characteristics of burst and variable length, which is very different from SDH frames that require strict synchronization. Therefore, it is necessary to introduce a suitable data link layer adaptation protocol to complete Ethernet data encapsulation, including data buffering, Queue scheduling, etc., realize frame mapping t...

Claims

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Application Information

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IPC IPC(8): H04L12/26H04J3/16H04L29/06
Inventor 鲍胜青
Owner OPWILL TECH BEIJING
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