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Processor instruction set supporting part statement function of higher order language

A technology of processor instruction and high-level language, which is applied in the direction of electrical digital data processing, instruments, memory systems, etc., can solve problems such as memory performance bottlenecks, lack of direct support for high-level languages, complex instruction formats, etc., to facilitate compiler design, Avoid the large consumption of decoding time and simplify the effect of mapping

Inactive Publication Date: 2008-08-20
BEIJING INSTITUTE OF TECHNOLOGYGY
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The CISC instruction set has powerful functions, multiple addressing modes, and better support for high-level languages, but the variable-length encoding method is used, and the instruction format is complex; at the same time, the interaction with the memory becomes a performance bottleneck
The RISC instruction set instruction format is regular and the length is the same, but the processor oriented to the register-memory structure only interacts with the memory through the LOAD / STORE instruction, and completes operations such as arithmetic logic transfer in the register. By simplifying the operation of each instruction, It is convenient for pipelining to improve execution efficiency, and generally does not provide direct support for high-level languages

Method used

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  • Processor instruction set supporting part statement function of higher order language
  • Processor instruction set supporting part statement function of higher order language
  • Processor instruction set supporting part statement function of higher order language

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Embodiment Construction

[0019] The present invention will be further described below in conjunction with the accompanying drawings and embodiments.

[0020] The embodiment of the present invention takes the instruction format of the 64-bit fixed-length instruction set and the special instruction supporting the high-level language statement in the instruction set as an example, but is not limited to this example.

[0021] The basic encoding method of 64-bit instructions described in Figure 1 shows the instruction format. The instruction length is 64 bits, and the leftmost part contains 1 reserved bit, followed by the opcode field, addressing mode descriptor field, and address code field. The position of the opcode field is fixed, the length is determined to be 6 digits, the first digit is reserved, and the first 3 digits of the last 5 digits of the opcode are coded to distinguish the operation types, including addition and subtraction (000), multiplication and division (001), logic operations (010), a...

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Abstract

The invention relates to a processor instruction set supporting partly statement function of high-level language. Single instruction completes partly statement function of high-level language, combines particular coded format of given length and evident address, and processor structure without register documentary. The high-level language supporting comprises A=B op C type sentence, Java language and selective sentence, switch sentence and function call sentence of C++. The invention also provides an encoded mode of the particular instruction set which comprises reserved bit and command code with fixture and given length, addressing modes descriptor and address code. The instruction and data are all stored in multi-port memory which provides absolute accessing passage for the instruction and data, and the processor directly obtain the instruction and three operands from the memorizer synchronously. The instruction set of the invention is similar to high-level languages and is convenient for the compiler to compile, also the instruction format is regular and code decoding is quick and simple.

Description

technical field [0001] The present invention relates to a processor instruction set, more specifically, the present invention relates to the support of the instruction set to the function of some high-level language sentences, its encoding method and the corresponding processor structure. Background technique [0002] The instruction set is the intermediary between software and hardware, and high-level language programs need to be translated into the target instruction set before they can be executed on the hardware. The current mainstream instruction set can be divided into complex instruction set (CISC instruction set) and reduced instruction set (RISC instruction set). [0003] The CISC instruction set has powerful functions, multiple addressing modes, and better support for high-level languages. However, the variable-length encoding method is used, and the instruction format is complex; at the same time, the interaction with the memory becomes a performance bottleneck. ...

Claims

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Application Information

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IPC IPC(8): G06F9/45G06F9/34
Inventor 石峰左琦刘彩霞薛立成
Owner BEIJING INSTITUTE OF TECHNOLOGYGY
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