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Optimum polarity search method for digital integrated circuit design

A technology of integrated circuits and search methods, which is applied in the fields of electrical digital data processing, computing, energy-saving computing, etc., can solve problems such as chip packaging difficulties, increased power consumption, failure, and shortened lifespan, and achieve power consumption and area optimization, power consumption low effect

Inactive Publication Date: 2008-07-09
NINGBO UNIV
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  • Description
  • Claims
  • Application Information

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Problems solved by technology

The continuous increase of power consumption not only causes various portable devices to encounter power supply problems, but also the overheating of chips can easily cause their work to fail and shorten their life, and it also makes chip packaging more difficult

Method used

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  • Optimum polarity search method for digital integrated circuit design
  • Optimum polarity search method for digital integrated circuit design
  • Optimum polarity search method for digital integrated circuit design

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Embodiment Construction

[0034]Below in conjunction with embodiment the present invention is described in further detail.

[0035] An optimal polar search method for digital integrated circuit design, which includes the following steps:

[0036] ① On the basis of judging the probability value of the input signal, the power consumption algorithm of the multi-input XNOR gate is optimized by adjusting the probability value of the input signal:

[0037] It is known from the prior art that for a circuit composed of n gates, its total dynamic power consumption can be expressed as:

[0038] P = 1 2 V dd 2 f clk Σ i = 1 n C L i E sω i - - - ( ...

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Abstract

The invention discloses an optimum polarity search method for the design of a digital integrated circuit, which comprises the following steps: establishing a XNOR / OR circuit power consumption estimation model through optimizing the power consumption algorithm of a multi-input XNOR gate, so as to obtain the switching activity of the whole XNOR / OR circuit; utilizing the rapid list polarity conversion algorithm to realize conversion from the maximum item of a Boolean function to the XNOR / OR circuit expansion under the 0 polarity; carrying out the list technology-based polarity conversion algorithm according to the order of Gray code, so as to obtain the XNOR / OR circuit expansion under the other 2<N> minus 1 polarities; and finally obtaining the minimum power consumption, the minimum area and the minimum cost value and the optimum polarity of the XNOR / OR circuit. The invention has the advantages that the XNOR / OR logic circuit with the lower power consumption can be obtained; by measuring 10 MCNC Benchmark circuits, the XNOR / OR circuit corresponding to the optimum polarity searched via the method of the invention can save the switching activity and the area respectively by 94.4 percent and 82.2 percent at the most when comparing with the polarity 0,, and the 10 circuits can averagely save the witching activity and the area by 68.4 percent and 34.2 percent respectively.

Description

technical field [0001] The invention relates to a design method of a digital integrated circuit, in particular to an optimal polarity search method for digital integrated circuit design. Background technique [0002] Information, material and energy are the three elements that modern society relies on for survival, among which the information industry has become the fastest growing industry since the end of the last century. At present, information electronic products have become a symbol of civilization and progress in the modern information society, and integrated circuits play a supporting role in the information industry. With the rapid development of electronic technology, the working speed of circuits is getting faster and faster, and the integration level of integrated circuits is getting higher and higher, which leads to a sharp increase in power consumption. The continuous increase of power consumption not only causes various portable devices to encounter power sup...

Claims

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Application Information

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IPC IPC(8): G06F17/50G06F17/30
CPCY02D10/00
Inventor 汪鹏君陆金刚
Owner NINGBO UNIV
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