Semiconductor device and method of manufacturing the same

A semiconductor and conductive film technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, transistors, etc., can solve problems such as difficult control of impurity concentration, achieve suppression of short channel effects, prevent hot carrier degradation, and improve conductivity The effect of passing current

Inactive Publication Date: 2008-06-25
SEMICON ENERGY LAB CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0009] In the structure described in Patent Document 1, it is not easy to control the impurity concentration in the LDD region (Loff region) that does not overlap the gate electrode with the gate insulating film in between.

Method used

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  • Semiconductor device and method of manufacturing the same
  • Semiconductor device and method of manufacturing the same
  • Semiconductor device and method of manufacturing the same

Examples

Experimental program
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Embodiment approach 1

[0042] Hereinafter, a method of manufacturing a semiconductor device according to this embodiment will be described with reference to FIGS. 1A to 1D , FIGS. 2A to 2H , and FIGS. 6A and 6B .

[0043] First, base insulating film 112 is formed on substrate 111 to a thickness of 100 to 300 nm. As the substrate 111, an insulating substrate such as a glass substrate, a quartz substrate, a plastic substrate, a ceramic substrate, or the like; a metal substrate; a semiconductor substrate, or the like can be used.

[0044]As the base insulating film 112, silicon oxide (SiOx), silicon nitride (SiNx), silicon oxide containing nitrogen (SiOxNy) (x>y), silicon nitride containing oxygen (SiNxOy) (x>y) can be used. A single-layer structure of an insulating film containing oxygen or nitrogen, or a laminated structure thereof. In particular, when there is concern about contamination from the substrate, it is preferable to form a base insulating film.

[0045] In addition, when the base insula...

Embodiment approach 2

[0090] In this embodiment mode, a method of manufacturing a semiconductor device having only the Loff region is shown using FIGS. 3A to 3D . In addition, in this embodiment, the same code|symbol is used for the same part as Embodiment 1, and detailed description is abbreviate|omitted.

[0091] The structure in FIG. 1C is obtained by performing the same steps as in Embodiment Mode 1 to the second etching (see FIG. 3A ). However, in FIG. 3A , a base insulating film 112 , an island-shaped semiconductor film 113 , a gate insulating film 161 , a first gate electrode 162 , and a second gate electrode 163 are formed over a substrate 111 . In this embodiment, the width of the first gate electrode 162 is the same as that of the second gate electrode 163 . In addition, the second gate electrode 163 may or may not have a tapered angle.

[0092] The gate insulating film 161 is thinner than the film thickness of the region under the first gate electrode 162 and the second gate electrode ...

Embodiment approach 3

[0099] In this embodiment mode, a method of manufacturing a semiconductor device having only the Loff region, which is different from the second embodiment mode, is shown using FIGS. 4A to 5D . In addition, in this embodiment, the same code|symbol is used for the same part as Embodiment 1 and Embodiment 2, and detailed description is abbreviate|omitted.

[0100] First, the structure of FIG. 3C is obtained in the same manner as in Embodiment 2 (see FIG. 4A ). In other words, the base insulating film 112 , the island-shaped semiconductor film 113 , the gate insulating film 161 , the first gate electrode 162 , and the second gate electrode 163 are formed on the substrate 111 . A channel formation region 126 and low-concentration impurity regions 152 a and 152 b are formed in the island-shaped semiconductor film 113 .

[0101] The gate insulating film 161 is thinner than the film thickness of the region under the first gate electrode 162 and the second gate electrode 163 , except...

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Abstract

An object of the present invention is to improve the operating characteristics and reliability of semiconductor devices. The invention relates to a peninsula body device, which includes: an island-shaped semiconductor film having a channel formation region, a first low concentration impurity region, a second low concentration impurity region, and a high concentration impurity region including a silicide layer; a gate insulation film; a first gate electrode overlapping the channel formation region and the first low concentration impurity region with the gate insulating film sandwiched therebetween; a first gate electrode overlapping the channel formation region with the gate insulating film sandwiched therebetween a second gate electrode; sidewalls formed on the sides of the first gate electrode and the second gate electrode, wherein the film thickness of the gate insulating film on the second low-concentration impurity region is thinner than that on the other side film thickness over the area.

Description

technical field [0001] The present invention relates to a semiconductor device and its manufacturing method. Background technique [0002] In recent years, in many cases, various circuits are formed using thin film transistors (Thin Film Transistor: hereinafter referred to as TFT) over the same substrate. However, when various circuits are formed using TFTs, it is necessary to form TFTs having different structures corresponding to the circuits. This is because, for example, in a display device, the operating conditions of the TFTs in the pixel portion are not always exactly the same as those of the TFTs in the driver circuit, and therefore each TFT is required to have different characteristics. [0003] TFTs in a pixel portion composed of n-channel TFTs function as switching elements and are driven by applying a voltage to liquid crystals. The TFT in the pixel portion is required to have a very low off-current value in order to store charges accumulated in the liquid cryst...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/786H01L29/423H01L21/336H01L21/28
CPCH01L29/66757H01L29/42384H01L29/4908H01L27/1214H01L2029/7863H01L29/78621H01L27/127
Inventor 冈本悟关口庆一
Owner SEMICON ENERGY LAB CO LTD
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