Nondestructive detecting method for strain silicon heterojunction in insulator
A non-destructive testing and strained silicon technology, applied in the direction of measuring devices, instruments, scientific instruments, etc., can solve the problems of introducing defects, observation results that cannot reflect the real situation, dislocations moving out of the sample surface, etc., and achieve the effect of simple experimental procedures
Inactive Publication Date: 2010-11-10
GUOBIAO BEIJING TESTING & CERTIFICATION CO LTD
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Problems solved by technology
When preparing samples for transmission electron microscopy analysis, it is very easy to introduce defects artificially, and because the observed samples are very thin, dislocations are likely to move out of the sample surface during the observation process, resulting in observations that cannot reflect the presence of defects in the sample. reality
Atomic force microscopy and Raman spectroscopy are both non-destructive testing techniques. However, generally only the structural information of the sample surface or surface layer can be obtained, and the spatial distribution of dislocations cannot be determined.
As a non-destructive testing technique with high spatial resolution, synchrotron radiation dual crystal topography can simultaneously obtain the spatial distribution information of defects in the epitaxial layer and the substrate. Spatial distribution information of defects in the strained Si heterojunction epitaxial layer and substrate due to multiple Si layers in twin rocking curves obtained by symmetric diffraction for strained Si heterojunctions obtained by different methods on SOI The diffraction peaks merged, making it impossible to judge the corresponding relationship between the Si layer diffraction peaks and each Si layer. Topography to analyze strained Si layers and other Si layer structures
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Abstract
The invention provides a nondestructive examination method of heterojunction of strained silicon on an insulator, which comprises: (1) Experimental arrangement according to X-ray double crystal symmetrical diffraction geometry based on the crystallography structural feature of the heterojunction of the stained silicon to be examined; (2) making use of synchrotron radiation monochromatic light to conduct double crystal symmetrical diffraction on a specimen to acquire a rocking curve, and to acquire the diffraction peaks of the heterojunction of the stained silicon; (3) rotating the specimen by180 degrees around the surface normal to acquire another rocking curve; (4) comparing the double crystal rocking curves before and after the specimen turns by 180 degrees, and determining the correspondence of each of the diffraction peaks and the diffraction structure; (5) adjusting the angle of incidence of the incident ray so that combined diffraction peaks of Si layer appear asymmetric or divided peaks appear; (6) fixing the angles of incidence of the incident ray, and shooting the synchrotron radiation topography image corresponding to the diffraction structure on each diffraction peak. The invention has the advantages of simple and quick experimental procedures, capability of acquiring the spatial distribution of dislocation of the heterojunction of the stained silicon, and relevantcrystallography information without destroying the specimens.
Description
Nondestructive testing method for strained silicon-on-insulator heterojunction technical field The invention belongs to an analysis method for a strained silicon heterojunction on an insulator, in particular to a nondestructive detection method for a Si / SiGe / Si-SOI heterojunction. Background technique Strained silicon can improve the mobility of electrons and holes, and is expected to be the n-type and p-type channel material of high-performance metal-oxide-semiconductor field-effect transistors (MOSFETs). Strained silicon channel n-type and p-type MOSFETs with enhanced electron and hole mobility can be obtained using relaxed SiGe epitaxial layers on insulator as substrates. This technology integrates the advantages of Silicon-On-Insulator (Silicon-On-Insulator, SOI) and SiGe technologies. The strain relaxation process of the SiGe epitaxial layer is usually realized by introducing misfit dislocations (MisfitDislocation) at the interface between the SiGe epitaxial layer an...
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Patent Type & Authority Patents(China)
IPC IPC(8): G01N23/207G01N23/205
Inventor 马通达屠海令胡广勇孙泽明邵贝羚刘安生
Owner GUOBIAO BEIJING TESTING & CERTIFICATION CO LTD
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