A byte replacement circuit for power consumption attack prevention

Abstract

The invention discloses a byte alternative circuit of anti power consumption attack that includes coding unit, random switching unit, S-box unit, and recovery unit. The S-box unit consists of 4-16 isomerous S-boxes. The invention adopts isomerous S-box unit to replace the traditional signal S-box, the switching unit is inserted in the input end of S-box unit, and the recovery unit is added behind the output end. When it is been attracting, the invention can select according to the input data of attack, and no need the additional random number generator. On the other hand, the method which adds the number of random plaintext is invalid for the circuit which is provided by the invention. The invention don't need to apply the special circuit and logical mode, and can be compatible with the presexisting AES enciphering circuit. The invention can improve the anti power consumption attack greatly with less expense, and it can cover the key when the hardware of AES is encrypting and decrypting to make the power attack not get the correct key.

Description

technical field [0001] The invention belongs to the field of digital integrated circuits, and specifically relates to a byte replacement circuit resistant to power consumption attacks. The byte replacement circuit is specially used to implement the AES (Advanced Data Encryption Standard) algorithm, and is especially suitable for smart cards that may be attacked by power consumption , electronic key chips and wireless sensors and other hardware products. Background technique [0002] On October 2, 2000, the National Institute of Standards and Technology (NIST) officially announced the selection of the Rijndael algorithm as the new Advanced Encryption Standard AES (Advanced Encryption Standard) to replace the old data encryption standard DES (Data Encryption Standard). AES is designed as an encryption algorithm with strong security performance and can support various small devices. As the successor of DES, AES has been used as the de facto encryption standard by industry, ban...

AI Technical Summary

Problems solved by technology

The disadvantage of the above method is that the implementation is more complicated and the cost is higher

If a special circuit logic implementation form is adopted, the basic logic gate circuit needs to add some additional circuits to balance power consumption, so that there will be a loss in area and power consumption; other special logic forms are not compatible with existing chip technology Compatible with layout library, so design and production need to pay extra cost

On the other hand, if masking technology is used, a random number generator, additional masking logic and recovery logic need to be added to the chip, which will increase the cost of AES hardware implementation and reduce performance.

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