Semiconductor device and manufacturing method for the same

Abstract

A bipolar semiconductor device including a collector layer covered at a portion of an outer periphery thereof with an insulating film and having a shape extending in an upper direction and a horizontal direction, with a gap being formed between the collector layer and the insulating film, and further including a base layer and an emitter layer disposed over the collector layer, and a manufacturing method of the semiconductor device. Since the collector layer has a shape extending in a portion thereof in the upward direction and the horizontal direction, an external collector region can be deleted, and both the parasitic capacitance and the collector capacitance in the intrinsic portion attributable to the collector can be decreased and, accordingly, a bipolar transistor capable of high speed operation at a reduced consumption power can be constituted.

Description

CLAIM OF PRIORITY[0001]The present application claims priority from Japanese Application JP 2003-174228 filed on Jun. 19, 2003, the content of which is hereby incorporated by reference as if set forth in the entirety herein.FIELD OF THE INVENTION[0002]The present invention relates to a semiconductor device and a manufacturing method thereof, and more particularly to a semiconductor device and method including at least one bipolar junction transistor.BACKGROUND OF THE INVENTION[0003]In recent years, bipolar transistors having high speed performance have been used in various fields of application, such as communication devices and storage systems. A bipolar transistor capable of increasing operation speed is the bipolar transistor using a selective epitaxial technology disclosed, for example, in JP-A No. 7-147287. FIG. 2 illustrates a p-type base layer 109 and an n-type type emitter region 111 formed in a patterned structure, wherein the width of the base layer 109 is determined by th...

AI Technical Summary

Benefits of technology

[0008]The present invention provides a semiconductor device and device manufacturing method capable of reducing an external collector area while maintaining a low base resistance. The semiconductor device and method also allow for a decrease in the parasitic capacitance between the collector and the base that typically inhibits increase of the operation speed, and a decrease of the consumption power in a bipolar transistor.

[0015]Therefore, the present invention provides a bipolar junction transistor having low consumption power, high speed, and low parasitic capacitance.

Problems solved by technology

However, in existent bipolar transistors, the parasitic capacitance between the base and the collector inhibits high speed operation of the transistor.

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