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Serial communiction bus external equipment interface

A technology of serial communication bus and external equipment, applied in the direction of instruments, electrical digital data processing, etc., can solve the problems of high overhead, low efficiency, and not supporting full-duplex transmission, etc., and achieve simple structure, high transmission efficiency, and wide application range wide effect

Inactive Publication Date: 2005-03-02
VIMICRO CORP
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AI Technical Summary

Problems solved by technology

The disadvantage of this high-level protocol is that it does not support full-duplex transmission; it does not support SPI interrupt transmission, that is, the SSN must be kept low during the entire frame transmission; The overhead of data is large and the efficiency is low

Method used

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  • Serial communiction bus external equipment interface
  • Serial communiction bus external equipment interface
  • Serial communiction bus external equipment interface

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Embodiment Construction

[0029] In order to describe the technical solution of the present invention more clearly, it is necessary to describe in detail the structural principle of the high-level protocol used in the present invention.

[0030] The high-level protocol is a master-slave full-duplex or half-duplex communication protocol, all transmissions are initiated by the host, and the host can send and receive data at the same time. Supports SPI interrupt transmission, and does not require SSN to remain low during the entire frame transmission process. The length of the frame header is variable, and a short frame header is used when transmitting a small amount of data to improve transmission efficiency.

[0031] A high-level protocol frame consists of two parts, the frame header and the payload, as shown in Figure 2. Because it carries variable data volume services, in order to improve transmission efficiency, a variable-length frame structure is adopted. In this high-level protocol, both the fra...

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Abstract

The serial communication bus peripheral interface consists of physical layer protocol realizing module, higher layer protocol realizing module and interface module. The physical layer protocol realizing module receives serial clock signal and generates clock signal output to the higher layer protocol realizing module and the interface module in SPI mode; the interface module connects the effective selection signal line of the slave equipment, I / O data line of the master / slave equipment and read / write data line to form the read / write data channel of the serial communication bus peripheral interface; and the higher layer protocol realizing module receives the higher layer protocol frame for data communication, receives forced sync signal from the master equipment for united sync of master and slave equipment and outputs read / write address signal and read / write enable signal. The present invention has the features of high, universality, high transmission efficiency, etc.

Description

technical field [0001] The invention relates to a serial communication bus external device interface. technical background [0002] Serial communication is a very important data communication method between the master device and the external device. Fewer data lines are required compared to a parallel communication bus. Serial Peripheral Interface (Serial Peripheral Interface, SPI) is a synchronous serial bus proposed by Motorola, which is used for data exchange between the master device and the peripheral device. The SPI bus is a master-slave communication mechanism, the host is the master, and the peripheral is the slave. The SPI bus consists of 4 buses, namely the serial clock line (SCK), the master device input / slave device output data line (MISO), the master device output / slave device input data line (MOSI) and the slave device effective selection line ( SSN). The SPI interface is a simple 8-bit data synchronous serial interface. This interface is used for fast seri...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/42
Inventor 王军金传恩董欣
Owner VIMICRO CORP
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