Method and apparatus for accelerating processor to read and write scratch memory

Abstract

The invention relates to a method to accelerate processor to read / write register and its device, mainly using processor to externally connect up with an extended memory and adopting MEMORY MAPPING mode to map register address established in the extended memory with idle SFR address in the processor, and also using a sign switch processor as integrated computer emulation (ICE) mode or normal operating mode, and the processor still uses external data transmission instruction as in ICE mode and internal one as in normal operating mode to read / write external register, respectively.

Description

(1) Technical field [0001] The present invention relates to a method and device for accelerating a processor to read and write temporary registers, in particular to a method of using memory mapping (MEMORY MAPPING) to map the address of the temporary register of the expansion memory to the idle address of the internal temporary register of the processor , and then use the internal and external data transfer commands in ICE mode or normal operation mode by switching means, so as to solve the dilemma that the built-in ICE consumes resources and the external ICE has poor read and write performance. (2) Background technology [0002] In the single chip of the 8051 series, the special function register (SFR) plays a very important role, which is a 128Bytes directly addressable memory area. Its direct address is 80H~FFH, which is a temporary register used to store peripheral device control, status and data. For functions such as interrupt, serial port, timer / counter, etc., it must...

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Problems solved by technology

[0004] However, the performance of the above-mentioned external ICE method in reading and writing the scratchpad is obviously not good, mainly because the internal data transfer instruction (MOV) used by the processor to read and write the internal scratchpad usually only needs one machine cycle (MACHINECYCLE). The external data transfer instruction (MOVX) used by the extended memory requires two machine cycles

And the MOVX data transmission instruction is executed. After the operation of the accumulator (ACC) is completed, it is written back (WRITE BACK) to the original scratchpad, which affects its read and write speed even more.

In addition, when reading and writing other temporary registers, the address (in Ri or DPTR) must also be advanced first, so its performance in reading and writing speed is extremely poor, and the required program capacity is also large

At the same time, it cannot meet many occasions with high requirements for reading and writing.

[0005] From the above, it can be seen that when users use the SFR in the processor for various special functions, they must use ICE for debugging, but the built-in ICE consumes a lot of resources, and the external ICE does not perform well in reading and writing. The dilemma of processor development

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