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Sharing route realizing and sheduling method

A scheduling method and thread technology, applied in the field of shared thread implementation and scheduling, can solve the problems of not too many threads, increased thread switching times, waste, etc., to improve system operating efficiency, reduce switching time, and reduce the number of threads Effect

Inactive Publication Date: 2007-07-25
BEIJING ELECTRIC POWER ECONOMIC RES INST +1
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Problems solved by technology

One is that the increase in the number of threads will consume the number of kernel-bound processes (LWP), and this kernel resource is limited; May cause kernel access overhead, the time spent switching is completely extra
In view of the above problems, there are certain limitations in the practical application of multithreading. First, the number of threads should not be too large. Second, when the number of threads reaches a certain number, the overall performance of the system cannot be improved, or even decline.
At the same time, each thread is an independent running entity, but in the entire life cycle of the thread, the thread does not work all the time, and a lot of time is spent waiting for available resources, which is undoubtedly a waste

Method used

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  • Sharing route realizing and sheduling method

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Embodiment Construction

[0036] Specifically speaking, the implementation and scheduling method of the entire thread is:

[0037] 1. Thread creation

[0038] The creation of thread mainly completes the setting of thread control block and thread binding. The setting of thread control block includes the setting of thread entry (thread entry is the starting point of code execution when the thread is scheduled, and can be represented by the address pointing to the starting point), The setting of the thread entry is to save the address in the thread control block; the application and initialization of the event receiving area (the event receiving area is a memory buffer, and its application is to obtain an available memory space, and set the content in it as the initial state), these tasks are completely done in user space, and do not involve any access to kernel space, so the efficiency is very high. Thread binding is mainly based on the current thread usage status to determine whether to create a new sy...

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Abstract

A thread realization and dispatch method on data process operational platform relates to avoiding or reducing kernel thread switch, fully utilizing the processor efficiency and reducing system resources cost with the following stops: finishing design of thread controller, thread creation of thread bonding, starting operational thread activation, receiving items trigger transfer into operational state thread operation, finishing thread state switch, putting in order and operational array management thread dispatch and finishing clearance of thread data, releasing thread symbol, exit of thread of adjusting system thread numbers.

Description

technical field [0001] The invention relates to a method for realizing and scheduling a shared thread in a data processing operation platform. Specifically, it relates to a shared thread implementation and scheduling method that can avoid or reduce kernel thread switching, fully utilize processor efficiency, and reduce system resource consumption. Background technique [0002] In a typical multitasking operating system, the memory space of the system is divided into user space and kernel space by hardware. User programs can only run in the user space. When the kernel needs to be used, special trap instructions need to be executed. The traditional process multitasking system is based on such a structure. All the information of the process control structure is in the kernel space, and each process switching will involve access to the kernel space. [0003] Multithreading technology allows a program to execute multiple tasks simultaneously and share resources in the process sp...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L12/24
Inventor 谭震
Owner BEIJING ELECTRIC POWER ECONOMIC RES INST
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