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Half duplex series communication bus external device interface

A technology of serial communication bus and external equipment, applied in the direction of instruments, electrical digital data processing, etc., can solve the problems of high board-level design difficulty and complex structure, etc.

Inactive Publication Date: 2007-06-06
VIMICRO CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Those skilled in the art know that when designing an integrated circuit, each additional signal channel means that its structure is more complicated and the board-level design is more difficult.

Method used

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  • Half duplex series communication bus external device interface
  • Half duplex series communication bus external device interface
  • Half duplex series communication bus external device interface

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Embodiment Construction

[0026] In order to describe the technical solution of the present invention more clearly, it is necessary to describe in detail the structural principle of the high-level protocol used in the present invention.

[0027] The high-level protocol is a master-slave full-duplex or half-duplex communication protocol, all transmissions are initiated by the host, and the host can send and receive data at the same time. Supports SPI interrupt transmission, and does not require SSN to remain low during the entire frame transmission process. The length of the frame header is variable, and a short frame header is used when transmitting a small amount of data to improve transmission efficiency.

[0028] A high-level protocol frame consists of two parts, the frame header and the payload, as shown in Figure 1. Because it carries variable data volume services, in order to improve transmission efficiency, a variable-length frame structure is adopted. In this high-level protocol, both the fra...

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Abstract

The present invention provides a half-duplex serial communication bus peripheral equipment interface, including physical layer protocol implementation module, high layer protocol implementation module and interface module; the described interface module is connected with two data wires in SPI bus, namely main equipment input / slave equipment output data wire, and main equipment output / slave equipment input data wire, and also connected with reading data signal wire and writing data signal wire so as to form reading / writing data channel of said interface. Said invention also includes SPI data wire multiplex module.

Description

technical field [0001] The invention relates to the field of serial communication, in particular to a half-duplex serial communication bus external device interface using a high-level protocol based on a serial synchronous peripheral device interface (Serial Peripheral Interface, SPI). technical background [0002] Serial communication is a very important data communication method between the master device and the external device. Fewer data lines are required compared to a parallel communication bus. Serial Synchronous Peripheral Interface (Serial Peripheral Interface, SPI) is a synchronous serial bus proposed by Motorola, which is used for data exchange between the master device and the peripheral device. The SPI bus is a master-slave communication mechanism, the master device is the master device, and the peripheral device is the slave device. The SPI bus consists of 4 buses, namely the serial clock line (SCK), the master device input / slave device output data line (MISO...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F13/42
Inventor 王军金传恩董欣
Owner VIMICRO CORP
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