Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Method of forming semiconductor device

A manufacturing method and semiconductor technology, applied in the fields of semiconductor/solid-state device manufacturing, semiconductor devices, chemical instruments and methods, etc., can solve the problems such as the impossibility of improving the interface steepness, the undiscovered mobility, and the decrease of gm, and achieve epitaxy Steep interface, increased fT, increased gm effect

Inactive Publication Date: 2007-01-24
NEC ELECTRONICS CORP
View PDF1 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, even if the steepness of the AlGaAs / InGaAs epitaxial interface increases and the mobility of the two-dimensional electron gas increases, on the contrary, the surface carrier concentration decreases and gm becomes smaller, which still cannot increase fT
In addition, when the holding time is 1 minute or less, since the remaining In cannot be sufficiently evaporated, the improvement of the interface steepness is impossible, and no increase in the mobility is observed.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Method of forming semiconductor device
  • Method of forming semiconductor device
  • Method of forming semiconductor device

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0025] Below, explain figure 1 Example shown. First, in figure 1 Before the structure growth of the GaAs substrate 11 is cleaned, a cleaning process of 630° C. for 15 minutes is performed, and then a 0.5 μm non-doped GaAs buffer layer 12 is grown at a substrate temperature of 600° C. down to 500°C, grow 15nm non-doped In 0.15 Ga 0.85 As channel layer 13, growing In 0.15 Ga 0.85After the As channel layer 13, the supply of In, Ga, and As was stopped (the growth was temporarily stopped), and at the same time, the substrate temperature was raised to 600°C. During this temperature rise period, remaining In of the InGaAs layer is evaporated. Since the remaining In does not provide As, it can be evaporated by breaking the bond with As, so the evaporation rate is increased, and the remaining In can be removed from the surface of the InGaAs channel layer in a short time. Since the stop time is about 45 seconds and there is no hold time, it is shorter than the conventional one ...

Embodiment 2

[0030] Figure 4 is a cross-sectional view showing an embodiment of the present invention in which planar doping is performed. In the figure, 21 represents the non-doped GaAs substrate, 22 represents the non-doped GaAs buffer layer, and 23 represents the non-doped In 0.2 Ga 0.8 As channel layer, 24 means non-doped Al 0.2 Ga 0.8 As liner layer, 25 means Si planar doped layer, 26 means non-doped Al 0.2 Ga 0.8 As blocking layer, 27 represents a Si-doped GaAs spacer layer, 28 represents a gate, 29 represents a source, and 30 represents a drain.

[0031] In this embodiment, before the start of the growth, the GaAs substrate 21 is cleaned at 630° C. for 10 minutes, and then a 0.5 μm non-doped GaAs buffer layer 22 is grown at a substrate temperature of 600° C. , lower the substrate temperature to 500°C, grow 10nm non-doped In 0.2 Ga 0.8 As channel layer 23, growing In 0.2 Ga 0.8 After the As channel layer 23, the supply of In, Ga, and As is stopped, and the growth is tempor...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The mobility of a two-dimensional electron gas is increased by increasing the steepness of an ALGaAs / InGaAs epitaxial interface, in which the storage of impurities at the epitaxial interface is small without decreasing sheet-carrier concentration, thereby it is possible to increase gm and improve fT. In a molecular epitaxial growing method, which performs the growning of a plurality of compound semiconductor crystal layers on a semiconductor substrate, after a compound semiconductor crystal layer containing In is grown, all supplies containing As are temporarily stopped. After the substrate temperature is increased to or more of a re-evaporation starting temperature of In, the semiconductor crystal layer, which is different from the compound semiconductor containing In, is grown. The evaporation of the excessive In is accelerated, the excessive In is evaporated in a short time, the grown stopping time can be shortened and the amount of carbon stored during the grown stopping can be decreased.

Description

technical field [0001] The present invention relates to a molecular beam epitaxial growth method for growing multiple compound semiconductor crystal layers on a semiconductor substrate, in particular to an interface improvement technology for growing multiple compound semiconductor crystal layers including InGaAs layers or InAlAs layers. Background technique [0002] Semiconductor devices with excellent high-frequency performance, such as Schottky gate electrolytic effect transistors (FETs) using III-V compound semiconductors represented by GaAs, are widely used in satellite broadcasting, satellite communications, mobile communications and microwave trunk communications , and demanded to improve its performance. In particular, in a low-noise FET, it is known that the use of a two-dimensional electron gas formed near the epitaxial interface of the channel layer and the electron supply layer greatly affects the characteristics of flatness and steepness of the interface. In su...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/20C30B23/02C30B29/40C30B23/08H01L21/203H01L21/338H01L29/778H01L29/812
CPCC30B23/02C30B29/40H01L21/31
Inventor 根岸均
Owner NEC ELECTRONICS CORP
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com