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Chip simulation verification system

A simulation verification, chip technology, applied in instruments, computing, electrical digital data processing, etc., can solve problems such as reducing verification efficiency and increasing the workload of the verification process, reducing workload, enriching checkpoints, and improving verification efficiency and verification. quality effect

Pending Publication Date: 2022-07-29
深圳云豹智能有限公司
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Problems solved by technology

In related technologies, chip verification is mainly based on the UVM (Universal Verification Methodology, Universal Verification Methodology) architecture, which puts forward very high requirements for verification personnel. function, which greatly increases the workload of the verification process and reduces the verification efficiency

Method used

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Embodiment Construction

[0027] In order to make the purpose, technical solutions and advantages of the present application more clearly understood, the present application will be described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application, but not to limit the present application.

[0028] First, briefly explain the terms involved in the embodiments of this application:

[0029] virtio protocol: virtio is an I / O paravirtualization solution, a set of general-purpose I / O device virtualization programs, and an abstraction of a set of general-purpose I / O devices in a paravirtualized hypervisor. It provides a set of communication frameworks and programming interfaces between upper-layer applications and various hypervisor virtualization devices (KVM, Xen, VMware, etc.), reducing compatibility problems caused by cross-platform, and greatly improving the...

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Abstract

The invention relates to a chip simulation verification system. The system comprises a host side test module, a host side data conversion module, an instantiation docking module, a chip side data conversion module and a chip side test module. As verification personnel only need to realize an interface conversion function, namely, conversion from upper-layer data to hardware virtio protocol data is realized through the chip side data conversion module and the host side data conversion module, the verification personnel can be prevented from learning and knowing virtualization services of various projects, writing of heavy result comparison codes is avoided, and the verification efficiency is improved. According to the method and the system, simulation of a host side on an IO generation process is avoided, simulation on a whole virtio driver is avoided, errors possibly caused by designing rm and checker in a UVM architecture and rewriting heavy codes are avoided, then the workload of verification personnel can be greatly reduced, establishment of a verification platform is completed in a short time, and verification efficiency and verification quality are greatly improved.

Description

technical field [0001] The present application relates to the technical field of chip verification, in particular to a chip simulation verification system. Background technique [0002] With the rapid development of the cloud computing industry, some hardware implements virtio back-end devices, such as smart network cards and DPU (Data Processing Unit, data processor) and other products. Hardware products often require silicon verification. In related technologies, chip verification is mainly UVM (Universal Verification Methodology, Universal Verification Methodology) architecture, which puts forward very high requirements for verification personnel, not only need to be familiar with the logical requirements of virtio protocol implementation, but also need to be proficient in virtio front-end drivers. function, which greatly increases the workload of the verification process and reduces the verification efficiency. SUMMARY OF THE INVENTION [0003] Based on this, it is n...

Claims

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Application Information

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IPC IPC(8): G06F30/398
CPCG06F30/398
Inventor 孙敬宇
Owner 深圳云豹智能有限公司
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