Semi-parallel SC decoder implementation method and system based on FPGA

An implementation method and a decoder technology, which are applied in the field of FPGA-based semi-parallel SC decoder implementation methods and systems, can solve the problem of difficult decoder generation, increase the structural complexity of the semi-parallel SC decoder, and increase a small amount of decoding. code delay and other problems to achieve the effect of optimizing the structure

Pending Publication Date: 2022-06-28
SUN YAT SEN UNIV
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Problems solved by technology

[0002] Polar code is a channel coding technology proposed by E.Arikan in 2007; this coding technology is currently the only channel coding technology that has been proven to achieve channel capacity. Polar code has the following advantages: fine code rate adjustment The serial offset decoding algorithm with better performance in mechanism and decoding end is very suitable for hardware programming because of its recursive characteristics, and achieves parallel decoding effect. Later, someone proposed a semi-parallel SC decoder structure. In the longer case, further reduce the number of instantiated processing units to increase the sacrifice of a small amount of decoding delay in exchange for less hardware resource occupation, but their semi-parallel SC decoder structure is difficult to achieve decoding during the decoding process. part of the decoder and the generation of modules, thus increasing the complexity of the structure of the semi-parallel SC decoder

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  • Semi-parallel SC decoder implementation method and system based on FPGA
  • Semi-parallel SC decoder implementation method and system based on FPGA
  • Semi-parallel SC decoder implementation method and system based on FPGA

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Embodiment Construction

[0053] The present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. For the step numbers in the following embodiments, it is only set for the convenience of illustration and description, and the order between the steps is not limited in any way. The execution order of each step in the embodiments can be adapted according to the understanding of those skilled in the art sexual adjustment.

[0054] refer to figure 1 , the present invention provides a kind of semi-parallel SC decoder implementation method based on FPGA, and this method comprises the following steps:

[0055] S1. Setting the parameters of the decoder and initializing the part and update module and the reverse sequence rearrangement module to obtain the initialized decoder;

[0056] S11. Set the parameters of the decoder, and set the fixed-point scheme of the system. The parameters of the decoder include the code length of the polar code t...

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Abstract

The invention discloses a semi-parallel SC decoder implementation method and system based on an FPGA, and the method comprises the steps: setting the parameters of a decoder, initializing a part, an updating module and a reverse sequence rearrangement module, and obtaining an initialized decoder; based on the initialized decoder, the processing unit group performs decoding operation on the processing units, and performs bit judgment according to an operation result to obtain a judgment result; and updating and reordering the part of the decoder and the updating module in sequence according to the judgment result, and outputting a decoding result. The system comprises an initialization module, a judgment module and an updating module. According to the invention, the structure of the semi-parallel SC decoder can be simplified, and a better decoding result can be realized at the same time. The semi-parallel SC decoder implementation method and system based on the FPGA can be widely applied to the technical field of channel coding.

Description

technical field [0001] The invention relates to the technical field of channel coding, in particular to an FPGA-based semi-parallel SC decoder implementation method and system. Background technique [0002] Polar code is a channel coding technology proposed by E.Arikan in 2007; this coding technology is currently the only channel coding technology that has been proven to achieve channel capacity. Polar code has the following advantages: fine code rate adjustment The serial offset decoding algorithm with better performance in mechanism and decoding end is very suitable for hardware programming because of its recursive characteristics, and achieves parallel decoding effect. Later, someone proposed a semi-parallel SC decoder structure. In the longer case, further reduce the number of instantiated processing units to increase the sacrifice of a small amount of decoding delay in exchange for less hardware resource occupation, but their semi-parallel SC decoder structure is diffic...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M13/13H03M13/00
CPCH03M13/13H03M13/6569
Inventor 陈江健陈翔彭福洲
Owner SUN YAT SEN UNIV
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