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Capacitor structure and preparation method thereof, semiconductor structure and preparation method thereof

A capacitor structure and semiconductor technology, which is applied in semiconductor/solid-state device manufacturing, capacitors, semiconductor devices, etc., can solve the problems of difficult reading/writing of capacitance, decline of unit capacitance storage capacity, and affecting DRAM performance, etc., to achieve increased area, weakening mutual contact, and increasing capacity

Active Publication Date: 2022-07-26
CHANGXIN MEMORY TECH INC +1
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  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In DRAM, the size of the cell array transistors is also reduced, and the area of ​​the unit capacitor is also reduced, but the reduction of the area of ​​the capacitor will lead to a decrease in the storage capacity of the unit capacitance, resulting in the reading / writing of the capacitor become more difficult, affecting the performance of DRAM

Method used

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  • Capacitor structure and preparation method thereof, semiconductor structure and preparation method thereof
  • Capacitor structure and preparation method thereof, semiconductor structure and preparation method thereof
  • Capacitor structure and preparation method thereof, semiconductor structure and preparation method thereof

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preparation example Construction

[0143] Embodiments of the present disclosure also provide a method for fabricating a capacitor structure. For details, please refer to the appendix. Figure 8 , as shown, the method includes the following steps:

[0144] Step 801: forming a first insulating layer on the substrate;

[0145] Step 802: forming a first mask on the first insulating layer;

[0146] Step 803 : forming a first through hole in the first insulating layer according to the first mask;

[0147] Step 804 : forming a first sub-electrode of the capacitor structure in the first through hole;

[0148] Step 805 : forming an Nth insulating layer, and forming an Nth mask on the Nth insulating layer, where N is greater than or equal to 2;

[0149] Step 806: Form an Nth through hole in the Nth insulating layer according to the Nth mask, and the Nth through hole and the N−1th through hole are connected in a direction perpendicular to the substrate. , among the N through holes, the orthographic projection of at le...

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Abstract

Embodiments of the present disclosure disclose a capacitor structure and a method for fabricating the same, a semiconductor structure and a method for fabricating the same, wherein the capacitor structure includes a substrate and a first electrode, a first dielectric layer and a first electrode disposed on the substrate. Two electrodes, wherein the first electrode includes at least two sub-electrodes that are continuously arranged and connected in sequence in a direction perpendicular to the substrate, and at least one of the at least two sub-electrodes is in the The orthographic projection on the substrate covers the orthographic projection of the other sub-electrode on the substrate; the first dielectric layer is arranged on at least part of the outer surface of the first electrode; the second electrode is arranged on the At least part of the outer surface of the first dielectric layer, and the second electrode is insulated from the first electrode.

Description

technical field [0001] The present disclosure relates to the technical field of semiconductors, and relates to, but is not limited to, a capacitor structure and a preparation method thereof, a semiconductor structure and a preparation method thereof. Background technique [0002] As semiconductor process technology continues to shrink, the cell area of ​​transistors is significantly reduced. In DRAM, the size of the cell array transistors is also reduced, and the area of ​​the unit capacitor is also reduced, but the reduction of the area of ​​the capacitor will lead to a decrease in the storage capacity of the unit capacitor, which will lead to the read / write of the capacitor. becomes more difficult and affects the working performance of DRAM. SUMMARY OF THE INVENTION [0003] In view of this, embodiments of the present disclosure provide a capacitor structure and a method for fabricating the same, a semiconductor structure and a method for fabricating the same. [0004]...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/108H01L49/02H01L21/8242H10B12/00
CPCH01L28/40H01L28/60H10B12/31H10B12/30H10B12/02H10B12/03H10B12/033H10B12/053H10B12/315
Inventor 曺奎锡
Owner CHANGXIN MEMORY TECH INC
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