Array substrate and display panel

Abstract

The invention discloses an array substrate and a display panel. A common electrode layer on the array substrate comprises a common electrode trunk and a plurality of common electrode branches, a pixel electrode layer comprises a plurality of mutually connected pixel electrode branches, each pixel electrode branch comprises a branch main body and a branch tail end connected with the branch main body, the branch tail end comprises a first side, a second side and a third side, the first side and the public electrode trunk are oppositely arranged to form a first gap, and the second side and the third side are oppositely arranged with the corresponding common electrode branches respectively to form a second gap and a third gap; a fourth gap is formed between the branch main body and the common electrode branch; and in the first gap, the second gap and the third gap, the width value corresponding to at least one gap is smaller than the width of the fourth gap. By reducing the gap between the branch tail end of the pixel electrode and the common electrode, the electric field intensity of the branch tail end is increased, and the electric field interference between the branch tail end and the common electrode caused by the scanning line and the data line is reduced.

Description

technical field [0001] The present application relates to the field of display technology, and in particular to an array substrate and a display panel. Background technique [0002] With the development of display technology, the display mode of the display panel is also constantly changing, from the previous twisted nematic (TN) mode to the in-plane switching (IPS) mode. Poor vision caused by anisotropy. [0003] In the current IPS display mode, Trace Mura often appears, that is, after the end of the previous frame, the liquid crystal molecules cannot be deflected to the deflection state required by this frame in time, resulting in image retention, especially in the sub-pixel gate line. The edge of the pixel in the direction, because the electric field component in the horizontal direction formed between the common electrode and the pixel electrode is weaker than that in the middle of the pixel, and the electric field component in the vertical direction is stronger than th...

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Problems solved by technology

[0003] In the current IPS display mode, Trace Mura often appears, that is, after the end of the previous frame, the liquid crystal molecules cannot be deflected to the deflection state required by this frame in time, resulting in image retention, especially in the sub-pixel gate line. The edge of the pixel in the direction, because the electric field component in the horizontal direction formed between the common electrode and the pixel electrode is weaker than that in the middle of the pixel, and the electric field component in the vertical direction is stronger than that in the middle of the pixel, and the Trace Mura phenomenon is more likely to occur

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