Bump connection placement in quantum devices in a flip chip configuration

Abstract

Within a layout of a first surface in a flip chip configuration, a bump restriction area is mapped according to a set of bump placement restrictions, wherein a first bump placement restriction specifies an allowed distance range between a bump and a qubit chip element in a layout of the first surface, and wherein a second bump placement restriction specifies an allowed distance range between the bump and a qubit chip element in a layout of a second surface in the flip chip configuration. An electrically conductive material is deposited outside the bump restriction area, to form the bump, wherein the bump comprises an electrically conductive structure that electrically couples a signal between the first surface and the second surface and is positioned according to the set of bump placement restrictions.

Description

technical field [0001] The present invention generally relates to methods, systems and computer program products for component placement in quantum devices. More specifically, the present invention relates to methods, systems and computer program products for bump connection placement in quantum devices in flip-chip configurations. Background technique [0002] Hereinafter, a "Q" prefix in a word or phrase indicates a reference to that word or phrase in the context of quantum computing, unless clearly distinguished when used. [0003] Molecules and subatomic particles obey the laws of quantum mechanics, the branch of physics that explores how the physical world works at a fundamental level. At this level, particles behave in strange ways, assume more than one state at the same time, and interact with other particles very far away. Quantum computing exploits these quantum phenomena to process information. [0004] The computers we use today are called conventional computer...

AI Technical Summary

Problems solved by technology

Likewise, simply increasing the length of two parallel rows (e.g., using two parallel rows of twelve qubits each) results in quantum devices with undesired additional area and the separation of qubits at one end of the row from those at the other end of the row. Additional complexity of qubit connections

Furthermore, long runs of such connections require additional qubit operations and lead to increased execution times of quantum algorithms

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