Chip testing device and chip testing method

Abstract

The invention discloses a chip testing device and a chip testing method. According to the embodiment of the invention, the chip testing device comprises a testing unit which is used for providing a testing signal for a chip and obtaining a feedback signal fed back by the chip; a probe card, used for electrically connecting the test unit and the chip, and the probe card being used for transmitting a test signal and a feedback signal; and a decoupling unit, electrically connected with the test unit, the feedback signal comprising a normal feedback signal fed back by a normal chip and an abnormal feedback signal fed back by a failure chip, and when the probe card is electrically connected with the chip, the decoupling unit filtering the abnormal feedback signal. According to the chip testing device and the chip testing method provided by the embodiment of the invention, the decoupling unit for filtering the abnormal feedback signal is arranged, so that the abnormal feedback signal and a normal feedback signal can be prevented from generating a coupling effect, and a condition that a qualified chip is judged as a failure chip during testing is prevented.

Description

Technical field [0001] The present invention relates to the field of semiconductor testing, and in particular, to a chip test device and a chip test method. Background technique [0002] The process of semiconductor production manufacturing generally includes integrated circuit design, wafer manufacturing, wafer test, wafer cutting, chip package, and finished chip test. Among them, the wafer test is a test after the wafer manufacturing is completed, and it is used to verify that each chip (Die) on the wafer meets the device characteristics and other design specifications. [0003] In the wafer test, it is usually used to use a probe card with a plurality of probes. The test pad is provided on the chip, and the probe card's probe is mutually disciplinary Contact, the electrical connection can be electrically tested. Test of multiple chips in the wafer is achieved by a plurality of contacts on the probe card. In the existing wafer test, it is not considered whether there is a measu...

AI Technical Summary

Problems solved by technology

In the existing wafer test, it is not considered whether different contacts will interfere with each other and cause measurement deviation. The measurement deviation is likely to lead to misjudgment of the yield rate of the wafer test result, that is, the chip that should have passed the test is tested as Failed, resulting in yield loss

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