Clock data transmitting circuit, clock data receiving circuit, clock data restoring circuit and clock data restoring method

Abstract

The invention discloses a clock data sending circuit, a clock data receiving circuit, a clock data restoring circuit and a clock data restoring method, and relates to the technical field of clock data recovery, the sending circuit comprises: a data encoder used for receiving user data, a user clock and a reference clock, and encoding the user data according to a set encoding rule and according to edge information of the reference clock,so that the information of the user clock is hidden on the encoded data and the lengths of the data before and after encoding are the same; a parallel-serial converter configured to serialize the encoded data; and a single-ended to differential circuit which is configured to perform single-ended to differential on the serialized data and output a differential signal for restoring the user data and the user clock. According to the invention, clock lines do not need to be arranged, the clock lines are saved, the wiring complexity is simplified, additional independent processing on the user clock is not needed, the calculation code amount is small, and clock data recovery can be reliably achieved.

Description

technical field [0001] The present application relates to the technical field of clock data recovery, in particular to a clock data sending circuit, a receiving circuit, a recovery circuit and a method. Background technique [0002] In data transmission technology, the traditional low-voltage differential signal LVDS (Low-Voltage DifferentialSignaling) transmission technology requires at least one set of data differential lines and a corresponding set of clock differential lines to sample and transmit data through the clock, that is to say, the traditional LVDS transmission technology It is necessary to transmit clock signal and data signal at the same time. It can be seen that if the traditional LVDS transmission technology is applied to a multi-channel LVDS branch system or complex system integration, it needs very strict requirements on clock wiring, and the complexity of LVDS clock wiring will easily lead to delay problems. [0003] With the development of technology, a...

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Problems solved by technology

[0005] The embodiment of the present application provides a clock data transmission circuit, a reception circuit, a recovery circuit and a method to solve the technical problem of high difficulty and high cost in the development of the clock data recovery technology CDR based on the SERDES technology in the related art

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