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Packaging process of back surface pre-etched bump type packaging structure

A technology of packaging technology and packaging structure, which is applied in the direction of printed circuits, electrical components, circuits, etc. connected with non-printed electrical components, can solve the problems of unable to install size chips, hinder the welding process, chip size restrictions, etc., and achieve saving film Exposure steps, improvement of production efficiency, effect of improvement of packaging efficiency

Pending Publication Date: 2021-10-01
江苏尊阳电子科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The current FBP packaging process is: after the front side of the metal substrate is etched, then the back side is etched. The shape of the back side is limited by the shape of the front side. When the pins are subsequently tinned, due to the cohesive force of tin, the entire product may deviate. The pins generally need to be set to a uniform size in order to keep the product balanced. Therefore, the existing lead frame cannot accommodate larger chips, resulting in the limitation of the chip size of the existing lead frame.
[0003] After the back area is etched twice, electro-tin plating is required. The heat dissipation pad of a chip with a larger size is relatively large in size, and the amount of solder paste and flux required is also large. The gap between the heat dissipation pad of the device and the heat dissipation pad of the PCB Formation of air bubbles due to gas generation hinders the soldering process and leads to poor contact
[0004] The existing process still has the following problems: multiple chemical etching brings environmental pollution problems, and the packaging efficiency is low, all of which require a new packaging process to solve the above problems

Method used

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  • Packaging process of back surface pre-etched bump type packaging structure

Examples

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Embodiment 1

[0047] see Figure 1~Figure 10 , the packaging process of a backside pre-etched bump packaging structure in this embodiment, the packaging process method includes the following steps:

[0048] Step 1. Take the metal substrate

[0049] see figure 1 , take a piece of metal substrate with appropriate thickness. The purpose of this plate is to provide support for circuit production and circuit layer structure. The material of this plate is mainly metal material, and the material of metal material can be copper, iron, stainless steel materials or other conductive metal substances;

[0050] Step 2. Pre-plating copper layer on the surface of the metal substrate

[0051] see figure 2 , pre-plating a copper layer on the surface of the metal substrate, the thickness of the copper layer is 2 to 10 microns, the preparation method can be chemical deposition, electrodeposition or vapor deposition, for the conductivity of the subsequent electroplating process;

[0052] Step 3: Photolit...

Embodiment 2

[0069] see Figure 12~22 , a packaging process of a backside pre-etched bump packaging structure in this embodiment, the difference between this embodiment and Embodiment 1 is:

[0070] Add a step between step 8 and step 9: coat a layer of insulating layer, such as green paint, on the back of the metal substrate that has been etched on the back of step 8. see Figure 11 .

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Abstract

The invention relates to a packaging process of a back surface pre-etched bump type packaging structure, which is characterized in that the front surface and the back surface of a metal substrate are simultaneously subjected to chemical etching, the position of the back surface can be staggered from the etching position of the front surface, and the etching shape and size of the back surface are not limited, so that a fixed shape and depth can be etched on the back surface according to product requirements; and customizing can be carried out according to requirements, the problem that the size of an existing chip is limited is solved, and a large-size chip can be attached to the front face; By means of back surface pre-etching, etching precision is improved, subsequent etching time and difficulty are reduced, packaging efficiency is improved, waste copper emission is reduced, environment is protected, and energy is saved at same time.

Description

technical field [0001] The invention relates to a packaging process of a backside pre-etching bump type packaging structure, which belongs to the technical field of semiconductor packaging. Background technique [0002] Flat Bump Package FBP (Flat Bump Package) is a new type of packaging, it is re-selected for some problems that cannot be fundamentally solved in the packaging process of Quad Flat No-lead Package QFN (Quad Flat No-lead Package) design plan. The current FBP packaging process is: after the front side of the metal substrate is etched, then the back side is etched. The shape of the back side is limited by the shape of the front side. When the pins are subsequently tinned, due to the cohesive force of tin, the entire product may deviate. The pins generally need to be set to a uniform size in order to keep the product balanced. Therefore, the existing lead frame cannot accommodate a chip with a larger size, resulting in the limitation of the chip size of the exist...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/31H01L21/56H05K1/18
CPCH01L23/3121H01L21/561H05K1/185
Inventor 吴奇斌吴莹莹李华
Owner 江苏尊阳电子科技有限公司
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