Preparation method of test sample and test sample

A technology for testing samples and samples, applied in the preparation method of test samples and the field of test samples, can solve the problems of high cost, inability to meet actual needs, low efficiency, etc., and achieve the effects of accurate acquisition, saving sample preparation costs, and reducing use costs.

Active Publication Date: 2021-10-01
YANGTZE MEMORY TECH CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, in the related art, due to the defects of the sample preparation method, the efficiency of preparing test samples for failure analysis is low, the cost is high, and it cannot meet the actual needs

Method used

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  • Preparation method of test sample and test sample
  • Preparation method of test sample and test sample
  • Preparation method of test sample and test sample

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preparation example Construction

[0065] Figure 4 It is a flowchart of a method for preparing a test sample according to an embodiment of the present disclosure. refer to Figure 4 As shown, the method includes the following steps:

[0066] S100: Provide a structure to be processed including a failure region; wherein, the structure to be processed includes: multi-level steps, a dielectric layer covering the steps, a contact plug located above the surface of the steps and disposed in the dielectric layer, and a dummy channel penetrating through the steps column.

[0067] S110: Thinning the structure to be treated towards the step along the preset direction intersecting the slope where the multi-level steps are located, so as to form a pretreated sample; wherein, the pretreated sample includes the failure area; along the preset direction, the surface of the pretreated sample remains The thickness of the contact plug is greater than or equal to a first preset thickness.

[0068] S120: removing the residual d...

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PUM

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Abstract

The embodiment of the invention discloses a preparation method of a test sample. The method comprises the following steps: a to-be-processed structure comprising a failure region is provided; wherein the to-be-processed structure comprises a plurality of steps, a dielectric layer covering the steps, a contact plug located above the surfaces of the steps and arranged in the dielectric layer, and a virtual channel column penetrating through the steps; the structure to be processed is thinned towards the steps in the preset direction intersecting with the inclined plane where the multiple steps are located, so that a preprocessed sample is formed; wherein the preprocessed sample comprises the failure area; in the preset direction, the thickness of the contact plug remaining on the surface of the preprocessed sample is greater than or equal to a first preset thickness; and the residual dielectric layer on the surface of the pretreatment sample is removed to expose the virtual channel column, and forming the test sample.

Description

technical field [0001] Embodiments of the present disclosure relate to the field of semiconductor technology, and in particular, to a method for preparing a test sample and the test sample. Background technique [0002] During the R&D and production process of semiconductor devices, it usually happens that an abnormality occurs in a certain part of the device. At this time, it is necessary to analyze the failure area to find out the abnormal problem. Through failure analysis, it can help R&D and production personnel to find design defects, abnormal changes in process parameters, or improper operation in production, and provide necessary feedback information for subsequent product design or production. [0003] In the process of failure analysis, the preparation of test samples becomes the first step in failure analysis. Therefore, how to provide good test samples to improve test efficiency or reduce test cost is particularly important. However, in the related art, due to t...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G01N23/227G01N23/2202G01N23/04G01N1/30
CPCG01N23/227G01N23/2202G01N23/04G01N1/30
Inventor 吴诗嫣夏卫东李漪
Owner YANGTZE MEMORY TECH CO LTD
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