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Preparation method of integrated semiconductor device and integrated semiconductor device

A semiconductor and integrated technology, applied in the field of semiconductor manufacturing, can solve the problems of metal bonding scheme device damage, limited integration density, wafer warpage, etc., achieve convenient series-parallel scheme, increase process window, and small via size Effect

Inactive Publication Date: 2021-09-28
格芯致显杭州科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0016] In view of this, the present invention provides a method for preparing an integrated semiconductor device and an integrated semiconductor device, using non-metallic bonding means to solve the problem of high cost and limited integration density of the patterned metal alignment bonding solution, and the entire surface of the metal Leakage and device damage of the bonding scheme, as well as issues such as wafer warpage, structural cracking and faults caused by metal bonding

Method used

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  • Preparation method of integrated semiconductor device and integrated semiconductor device
  • Preparation method of integrated semiconductor device and integrated semiconductor device
  • Preparation method of integrated semiconductor device and integrated semiconductor device

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preparation example Construction

[0077] Such as figure 1 As shown, the embodiment of the present invention provides a method for manufacturing an integrated semiconductor device, which mainly includes the following steps:

[0078] Step 1, providing a first substrate, and forming a first non-metallic bonding material layer on the surface of the first substrate;

[0079] Step 2, providing a second substrate, and forming a device material layer on the surface of the second substrate;

[0080] Step 3, forming a second non-metallic bonding material layer on the surface of the device material layer;

[0081] Step 4, bonding the second non-metallic bonding material layer and the first non-metallic bonding material layer to form a non-metallic bonding layer;

[0082] Step 5, removing the second substrate;

[0083] Step 6, performing patterned etching on the device material layer to obtain a device layer containing at least one semiconductor device.

[0084] In an optional embodiment, the material of the first sub...

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Abstract

The invention discloses a preparation method of an integrated semiconductor device and the integrated semiconductor device. The method comprises the steps of providing a first substrate, and forming a first nonmetal bonding material layer on the surface of the first substrate, providing a second substrate, and forming a device material layer on the surface of the second substrate, forming a second non-metal bonding material layer on the surface of the device material layer, bonding the second non-metal bonding material layer and the first non-metal bonding material layer to form a non-metal bonding layer, removing the second substrate, and performing graphical etching on the device material layer to obtain a device layer containing at least one semiconductor device. Through the non-metal bonding mode, the problem of electric leakage caused by overflowing of graphical etching metal and cleaning of metal particle residues after metal bonding is avoided, through the non-metal bonding mode, an effective etching high selection ratio is formed, a process window is increased, and feasibility is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for preparing an integrated semiconductor device and the integrated semiconductor device. Background technique [0002] With the development of miniaturization of LED (Light-Emitting Diode, light-emitting diode), concepts such as Mini and Micro have been proposed successively. At present, it is generally believed that light-emitting diodes with a long side of less than 400 microns are Mini LEDs (submillimeter light-emitting diodes), and light-emitting diodes with a long side of less than 100 microns and without a substrate are Micro-LEDs (micron light-emitting diodes). Among them, Micro-LED is LED miniaturization and matrix technology. The LED backlight is thinned, miniaturized, and arrayed, so that the size of the LED unit can be smaller than 100 microns, which is comparable to OLED (Organic Light-Emitting Diode, organic light-emitting diode) ) can ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/50H01L25/075H01L33/00H01L21/677
CPCH01L25/50H01L25/0753H01L33/005H01L21/67778
Inventor 李勇
Owner 格芯致显杭州科技有限公司
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