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Power balancer for series-connected load zones of integrated circuit

A power balance and integrated circuit technology, applied in the direction of circuit devices, DC power supply parallel operation, DC network circuit devices, etc., can solve the problems of limiting the reliability of chip packaging current flow, high power cost, etc.

Active Publication Date: 2021-09-03
GOOGLE LLC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, the total power conversion and power delivery efficiency can be roughly 75% to 85%, resulting in a large cost of electricity
Additionally, high-current application-specific integrated circuit (ASIC) packages may reach ball grid array (BGA) electromigration (EM) limits, limiting the amount of current that can be delivered into the chip package or compromising package reliability

Method used

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  • Power balancer for series-connected load zones of integrated circuit
  • Power balancer for series-connected load zones of integrated circuit
  • Power balancer for series-connected load zones of integrated circuit

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Embodiment Construction

[0025] In general, the systems and techniques described herein relate to power balancer circuits that enable multiple load regions of an IC to be powered in series while maintaining a balanced voltage across each load region. Each load zone is a group of one or more electrical loads fabricated on-chip and powered as a group using a common power source. An example load region is a processor core. For example, the cores of a multicore processor can be powered in series using the power balancer described in this document. Since the core (or other load zones) may require different amounts of current, a power balancer is used to maintain the same voltage level in each load zone. In some implementations, the power balancer includes separate voltage regulators for each load zone. Each individual voltage regulator further regulates the operating voltage in its load zone.

[0026] figure 1 is a diagram of a circuit 100 including a plurality of loads 120A- 120D powered in series and...

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Abstract

This disclosure relates to power balancer circuits that enable multiple load zones of an IC to be powered in series while maintaining balanced voltage at each load zone. In one aspect, a circuit includes load zones that are powered in series. The circuit includes a power balancer for balancing a voltage across each load zone. The power balancer includes an equivalent DC transformer array that includes, for each load zone, an equivalent DC transformer connected in parallel with the load zone. The power balancer includes, for each load zone, a bus capacitor connected in parallel with the load zone. Each equivalent DC transformer is electrically connected to each other equivalent DC transformer providing an electrical path for each bus capacitor to discharge current to each other bus capacitor when a voltage across a bus capacitor is greater than a voltage across another bus capacitor.

Description

technical field [0001] The present invention relates to power balancers for use in series load regions of integrated circuits. Background technique [0002] Traditional power delivery for microprocessors involves a voltage regulator next to the chip on the motherboard and a passive delivery network (PDN) from the voltage regulator all the way to the chip die. As the power and current of modern microprocessors continue to increase, this method of delivering power becomes extremely inefficient. For example, a processor running at 0.8V and 1000A may require a 24-phase voltage regulator power stage to convert a 12V input to 0.8V for the processor. Power conversion losses can easily reach or exceed 10%. [0003] The I2R loss (or DCIR drop loss) of the PDN also becomes very important because the voltage regulator is bulky and usually needs to be several inches away from the chip. Therefore, the overall power conversion and power delivery efficiency can be roughly 75% to 85%, re...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H02J1/10H02M3/00H02M3/06
CPCH02J1/106H02J1/102H02M3/00H02M3/06H02M1/0074H02M1/0077H02M3/33584H02M3/3376H02M3/07H02M3/01G05F1/613G05F1/62G05F1/577G05F1/618
Inventor 蒋帅格雷戈里·西齐科夫米海·波波维奇
Owner GOOGLE LLC
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