System and method for establishing simulation model of field effect transistor

Abstract

A system and method for establishing a simulation model of a field effect transistor are disclosed. The simulation model of the field effect transistor includes: a field effect transistor model, including four gate electrodes, source electrodes, drain electrodes, and body electrodes of the field effect transistor. Connection terminal; the first diode model, including the first diode, connected between the body electrode and the drain of the field effect transistor model; the second diode model, including the second diode, connected between the field effect transistor model Between the body electrode and the source, the first diode model and the second diode model characterize the leakage characteristics and capacitance voltage characteristics of the field effect transistor through breakdown voltage parameters and temperature parameters. The simulation model of the field effect transistor characterizes the leakage characteristics and capacitance voltage characteristics of the field effect transistor through the breakdown voltage parameters and temperature parameters, so that the model can better reflect the device characteristics, solve the convergence problem and ensure the accuracy of the simulation.

Description

technical field [0001] The invention relates to the technical field of device simulation, in particular to a system for establishing a simulation model of a field effect transistor and a method for establishing the same. Background technique [0002] Junction Field-Effect Transistor (JFET) is an active device with amplification function, which is widely used in circuit design and is also used to manufacture various semiconductor devices. In order to speed up the manufacturing cycle and avoid waste of resources, the circuit or semiconductor device is usually modeled and simulated before it is put into production, and the established device model is simulated by using SPICE simulation tools to obtain different fitting curves, so that it can be quickly Analyze whether the device can work normally, and whether the parameters are good. [0003] In the SPICE model of a conventional JFET, a parasitic diode is built between the gate and the source. When the voltage between the gate...

AI Technical Summary

Problems solved by technology

[0003] In the SPICE model of a conventional JFET, a parasitic diode is built between the gate and the source. When the voltage between the gate and the source is large, the gate current will be too large, which will cause convergence problems in SPICE simulation. Unable to accurately analyze the parameter characteristics of the model

Although the series resistance of the gate can alleviate the convergence problem, it will affect the characteristics of the model's current / capacitance variation with voltage, which will seriously affect the accuracy of the JFET model.

Therefore, the simulation accuracy of the current JFET model is not high

Images