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Configurable matrix multiplication device and algorithm

A matrix multiplication and matrix configuration technology, applied in the field of computing, can solve the problems of inability to dynamically adjust, increase power consumption, and inability to improve matrix operation performance, and achieve the effect of maximizing resource utilization

Pending Publication Date: 2021-07-13
安徽芯纪元科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

After the above-mentioned matrix multiplier is produced or leaves the factory, the matrix data calculation of the M rows and N columns included in it has been fixed, and the number of multipliers L in the multiplier accumulate calculator (Multiply Accumulate, MAC) is also fixed, and it needs to be carried out during the calculation process. Matrix block and data filling operation; if the M*N value is too small in the matrix multiplier design process, the matrix operation performance cannot be improved, that is, the number of matrix multiplication units is limited in one cycle; if the M*N value is too large If the value is large, the power consumption will be increased, and it is difficult to meet the requirements of the lower power consumption environment, which cannot be dynamically adjusted, and there is a waste of computing resources in the process of data filling and filling
And for the fully connected layer, the result matrix is ​​a single column or single row, which belongs to the calculation of matrix and vector. M*N matrix calculation is actually M*1 data calculation, and only M*1*L multiplication calculations can be completed in one cycle, that is Only one column in the operation circuit can be used for calculation, and all multipliers cannot be fully utilized. The above-mentioned matrix multiplier has waste of resources and is not suitable for calculation of the fully connected layer.

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  • Configurable matrix multiplication device and algorithm

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Embodiment 1

[0031] In this embodiment, any two non-single-row or single-column matrices are input to the matrix multiplication device (the main structure is as follows: figure 1 Shown) in carrying out multiplication, technical solution of the present invention is set forth in detail.

[0032] Step S1, inputting the first calculation matrix W into the first memory and inputting the second calculation matrix H into the second memory. Among them, W is a 4*7 matrix, and H is a 7*4 matrix, neither of which is a single-row and single-column matrix; see figure 2 and image 3 .

[0033] According to the size of the first calculation matrix and the second calculation matrix, the present embodiment can select 2 to 4 matrix calculation units, and can make full use of the multipliers in the selected matrix calculation units; each matrix calculation unit consists of 4 rows 4 columns of MACs; each MAC consists of 4 multipliers and 3 adders. If 2 matrix computing units are used, it is configured as...

Embodiment 2

[0041] In this embodiment, any non-single-row or single-column matrix and a single-column matrix are input into the matrix multiplication device for multiplication, and the technical solution of the present invention is described in detail.

[0042]Step S1, inputting the first calculation matrix W into the first memory and inputting the second calculation matrix H into the second memory. Among them, W is a 4*64 matrix, H is a 64*1 matrix, and H is a single-column matrix; see Figure 6 . Selected matrix calculation units P=4; each matrix calculation unit is composed of 4 rows and 4 columns of MAC; each MAC is composed of 4 multipliers and 3 adders.

[0043] Among them, the number of matrix computing units can be dynamically adjusted according to demand.

[0044] Step S2, the first storage and the second storage block W and H, respectively:

[0045]

[0046]

[0047]

[0048] Since the matrix H is a single-column matrix, according to the number of selected matrix cal...

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Abstract

The invention provides a configurable matrix multiplication device and algorithm; the configurable matrix multiplication device comprises an operation circuit, a first memory, a second memory and a controller, and the operation circuit comprises P matrix calculation units and is equipped with a matrix accumulator. The first memory and the second memory are respectively connected with the matrix calculation unit, the matrix calculation unit is connected with the matrix accumulator, and the controller is bidirectionally connected with the matrix calculation unit. Through the mode of the matrix operation unit group, the controller can select the matrix operation unit which needs to be adopted according to requirements and configure a high-performance or low-power-consumption mode, and all multipliers in the matrix operation unit group can be utilized, so that resource utilization maximization is realized.

Description

technical field [0001] The invention relates to the technical field of computing, in particular to a configurable matrix multiplication device and algorithm. Background technique [0002] Matrix multiplication is widely used in image processing, deep learning, signal processing and other fields. The convolutional neural network in deep learning mainly includes a convolutional layer and a fully connected layer, and the calculations of these two layers can be converted into matrix multiplication operations. [0003] In the prior art, patent CN109992743B proposes a matrix multiplier, which includes a memory, an arithmetic circuit, and a controller. After the above-mentioned matrix multiplier is produced or leaves the factory, the matrix data calculation of the M rows and N columns it includes has been fixed, and the number of multipliers L in the multiplier-accumulator (Multiply Accumulate, MAC) is also fixed, and it needs to be carried out during the calculation process. Mat...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F7/575G06F17/16
CPCG06F7/575G06F17/16
Inventor 黄光红刘振林广栋张笑
Owner 安徽芯纪元科技有限公司
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