Trench type capacitor device and preparation method

Abstract

The invention provides a preparation method of a trench type capacitor device. A trench capacitor region located on a first metal interconnection layer comprises a plurality of first trenches and capacitor structures which are located on a first dielectric layer and fill the first trenches, and the first trenches penetrate through the first dielectric layer and end at the first metal interconnection layer; a second trench penetrates through the first dielectric layer and ends at a second metal interconnection layer; an electrode interconnection layer is positioned on the capacitor structures; the capacitor structures are provided with openings; a second dielectric layer located on an upper electrode layer, and the openings penetrate through the second dielectric layer and end at the upper electrode layer; and the electrode interconnection layer is located on the second dielectric layer, fills the openings and the second trench, and is electrically connected with the upper electrode layer and the second metal interconnection layer. According to the invention, additional BARC filling and reverse etching are not needed, and independent photoetching and etching on the lower electrode layer are not needed either, so that the method has significant meaning.

Description

technical field [0001] The invention relates to the field of semiconductor passive device manufacturing, and more specifically, to a trench capacitor device and a preparation method. Background technique [0002] A capacitor is a passive device used for energy storage and is widely used in semiconductor circuits such as coupling, filtering, resonance, integration and compensation. The number of photolithographic layers of the trench capacitor device in the prior art is more than that of the plate capacitor, resulting in an increase in the cost of the manufacturing process. figure 1 It is the process flow of the trench capacitor device in the prior art, including capacitor trench lithography, lower plate lithography, capacitor dielectric layer / upper plate lithography, capacitor via hole lithography and interconnection metal lithography. sublithography. Moreover, before the photolithography of the lower plate, coating and back-etching of the bottom anti-reflective layer (BAR...

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Problems solved by technology

[0003] figure 2 Shown is the cross-sectional view of the trench capacitor device in the prior art after the photolithography of the lower electrode layer is completed. Usually, the dry or wet stripping process is used to remove the BARC and photoresist filled in the trench, and the dry process is used. During the process, the plasma is easy to cause plasma damage to the lower electrode layer

In addition, in order to increase the capacitance per unit area, the trench opening is reduced while increasing the depth of the trench capacitor device, thus making it difficult to remove the BARC and photoresist in the trench, and it is easy to form BARC residues and Photoresist residue, which ultimately affects the reliability and yield of trench capacitor devices

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