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Low-delay VDE satellite-borne downlink digital signal processing system based on FPGA

A digital signal, low-latency technology, applied in the field of signal processing, can solve the problems of low-latency, unavoidable transmission delay, etc., and achieve the effect of low-latency processing and low resource occupancy

Active Publication Date: 2021-03-19
SHANGHAI SPACEFLIGHT ELECTRONICS & COMM EQUIP RES INST
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  • Claims
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AI Technical Summary

Problems solved by technology

In this process, since the data needs to be buffered and forwarded, the transmission delay is unavoidable. In order to ensure the validity and accuracy of the signal sent by the spaceborne VDE communication equipment, a low-latency design is required.

Method used

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  • Low-delay VDE satellite-borne downlink digital signal processing system based on FPGA
  • Low-delay VDE satellite-borne downlink digital signal processing system based on FPGA
  • Low-delay VDE satellite-borne downlink digital signal processing system based on FPGA

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Embodiment Construction

[0043] The present invention will be described in detail below in conjunction with specific embodiments. The following examples will help those skilled in the art to further understand the present invention, but do not limit the present invention in any form. It should be noted that those skilled in the art can make several changes and improvements without departing from the concept of the present invention. These all belong to the protection scope of the present invention.

[0044] see figure 1 , an FPGA-based low-latency VDE satellite-borne downlink digital signal processing system, including: a data block and forwarding module, a block Turbo encoding and scrambling processing module, and a general modulation transmission processing module;

[0045] Described system is provided with corresponding system clock, and system clock is the working clock (as input to FPGA chip by crystal oscillator or signal source) of FPGA chip external input to FPGA chip, is used for FPGA chip ...

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Abstract

The invention provides a low-delay VDE satellite-borne downlink digital signal processing system based on an FPGA, and the system is characterized in that the system comprises a data partitioning andforwarding module, a partitioning Turbo coding and scrambling processing module, and a general modulation transmission processing module; and according to the low-delay digital signal processing method and module design based on the VDE communication protocol mechanism, VDE modulation signal sending delay is greatly reduced, FPGA resource occupation is reduced, and the low-delay digital signal processing method and module design can be applied to a VDE satellite-borne downlink digital signal processing scene.

Description

technical field [0001] The present invention relates to signal processing technology, in particular to an FPGA-based low-latency VDE satellite-borne downlink digital signal processing system, which is suitable for low-delay processing scenarios of downlink digital signals in different satellite-borne VDE frame formats. Background technique [0002] With the development of maritime communication technology, in order to solve the bottleneck of serious time slot conflict and low communication rate in the existing ship AIS communication system in some areas, the International Organization of Aids to Navigation (IALA) proposed the ship's VDE communication system, and in the VDE system The communication links between satellites and ships have been added to meet the different needs of offshore and far-sea ships, laying the foundation for complex and multi-functional maritime communication applications in the future. [0003] Space-borne VDE communication equipment is limited by the...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04B7/185H04L1/00
CPCH04B7/18517H04L1/0003H04L1/0006H04L1/0009H04L1/0016H04L1/0061
Inventor 田运通向前杜璞玉李惠媛殷惠惠罗小成
Owner SHANGHAI SPACEFLIGHT ELECTRONICS & COMM EQUIP RES INST
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