LDMOS device and manufacturing method thereof

Abstract

The invention discloses an LDMOS device and a manufacturing method thereof, wherein the manufacturing method comprises the steps: forming an epitaxial layer above a substrate, and forming a drift region and a well region in the epitaxial layer through injection; forming a gate structure above part of the well region; forming a first mask with a first opening above the epitaxial layer, forming an inversion region through oblique angle injection of a first opening, enabling the inversion region to be opposite to a drain region in doping in the drift region and to be in bilateral symmetry relative to the drain region, and meanwhile, forming an additional doping region with the same doping type as the well region in the well region through a second opening of the first mask; and doping a source region and the drain region in the first opening and the second opening. The LDMOS device has the advantages that the drain region, the inversion region in the drift region and the additional dopedregion with the same doping concentration as the well region in the well region are formed by using the same mask, so that the breakdown voltage of the device can be effectively improved, the specificon resistance of the device is reduced, the self-protection capability of the device is improved, and meanwhile, any additional cost is not increased.

Description

technical field [0001] The present application relates to the field of semiconductor device manufacturing, and more particularly, to LDMOS devices and methods of manufacturing the same. Background technique [0002] Laterally-diffused metal-oxide semiconductor (LDMOS) devices can meet the requirements of high voltage resistance and power control, and are often used in radio frequency power circuits. Such as figure 1 As shown, the LDMOS device includes: a substrate 10, a well region 11 and a drift region 12 located on the substrate 10 and in contact with each other, a source region 13 located in the well region 11, a drain region 14 located in the drift region 12, and a drain region located in the drift region 12. A gate structure 15 on the well region 11. Taking an N-type LDMOS device as an example, the substrate 10 and the well region 11 are P-type doped, and the drift region 12 , source region 13 and drain region 14 are all N-type doped. In the LDMOS device, the well re...

AI Technical Summary

Problems solved by technology

[0004] In the traditional process, in order to improve the electrical characteristics and self-protection ability of the LDMOS device, it is necessary to add an additional mask (mask) or use other more complicated processes during fabrication, thereby increasing the manufacturing cost of the device and reducing the production of the device efficiency

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