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Parameter compiling method and device and computer readable storage medium

A compiling method and parameter technology, applied in the field of artificial intelligence, can solve problems such as bloated software design and affecting the efficiency of algorithm execution

Active Publication Date: 2020-10-30
LANGCHAO ELECTRONIC INFORMATION IND CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Supporting multiple frameworks requires the underlying software of the hardware to adapt to each different operation, which will lead to bloated software design and affect the efficiency of algorithm execution

Method used

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  • Parameter compiling method and device and computer readable storage medium
  • Parameter compiling method and device and computer readable storage medium
  • Parameter compiling method and device and computer readable storage medium

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Embodiment Construction

[0049] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0050] In order to enable those skilled in the art to better understand the solution of the present invention, the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0051] Next, a parameter compilation method provided by the embodiment of the present invention is introduced in detail. figure 1 A flow chart of a parameter compilation method provided by an embodim...

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Abstract

The embodiment of the invention discloses a parameter compiling method and device and a medium. The method comprises the following steps: extracting network parameters contained in each model file; converting each network parameter into a corresponding intermediate parameter according to a preset parameter specification; allocating a corresponding memory address to each intermediate parameter according to the size information, the weight information and the context operation sequence number corresponding to each intermediate parameter; and storing the intermediate parameters and the memory addresses corresponding to the intermediate parameters into a preset storage space according to a set mode. By converting the network parameters of the model files, the model files of different frameworks can be converted into unified and hardware-friendly intermediate parameters, the correlation between various operation operations of the network parameters and hardware is relieved, and the problemsof software code redundancy, dependency library conflicts and the like caused by supporting various frameworks are well solved. The data is written into hardware in the FPGA preprocessing stage, so that communication between the host and the FPGA is not needed any more, and the communication pressure between the host and the FPGA does not exist.

Description

technical field [0001] The present invention relates to the technical field of artificial intelligence, in particular to a parameter compiling method, device and computer-readable storage medium. Background technique [0002] With the development of artificial intelligence in various fields, such as agriculture, finance, security, health care, manufacturing, etc., people urgently hope that the algorithm can calculate faster, with higher precision, and lower power consumption. To meet the demand for precision, major hardware manufacturers have developed accelerator cards and corresponding supporting tools specifically for artificial intelligence algorithm calculations to accelerate the popularization of artificial intelligence algorithms in daily use. [0003] For a wide variety of deep learning frameworks, algorithm developers may use multiple frameworks for development, and the workload in each framework is represented and executed in a unique way, so even a simple convolut...

Claims

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Application Information

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IPC IPC(8): G06F8/41
CPCG06F8/41
Inventor 曹其春董刚尹文枫梁玲燕
Owner LANGCHAO ELECTRONIC INFORMATION IND CO LTD
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