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Automatic frequency conversion method and system for DDR memory controller

A memory controller and automatic technology, applied in static memory, program control design, digital memory information, etc., can solve the problems of consuming CPU resources, increasing system power consumption, and long frequency conversion process

Active Publication Date: 2020-10-20
ASR MICROELECTRONICS CO LTD
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  • Abstract
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  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Its disadvantage is that the entire frequency conversion process takes a long time and needs to be executed repeatedly, consuming CPU resources and increasing system power consumption.

Method used

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  • Automatic frequency conversion method and system for DDR memory controller
  • Automatic frequency conversion method and system for DDR memory controller
  • Automatic frequency conversion method and system for DDR memory controller

Examples

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Embodiment Construction

[0024] see figure 1 The method for automatic frequency conversion of a DDR memory controller proposed by the present application includes the following steps.

[0025] Step S10: Initialize the DDR memory controller, set the highest frequency point Freq_max, the lowest frequency point Freq_min, the upper threshold u_max[i] of the utilization rate of each frequency point, the lower threshold u_min[i] of the utilization rate of each frequency point, collect The time interval t_def_itvl, the minimum collection time interval t_min_itvl, the initial value of the variable "frequency conversion time interval t_interval" is equal to the collection time interval t_def_itvl.

[0026] Among them, 0 ≤ Freq_min ≤ Freq_max < Freq_number. Freq_number refers to the number of frequency points supported by the DDR memory controller, and each frequency point corresponds to a different frequency. For example, the number of frequency points supported by the DDR memory controller is Freq_number, w...

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Abstract

The invention discloses an automatic frequency conversion method for a DDR memory controller. A step S10, a DDR memory controller is initialized. A step S20, the DDR memory controller calculates the bandwidth utilization rate u_cal of the DDR SDRAM under the current frequency point Freq_cur in each frequency conversion time interval t_interface. A step S30, the DDR memory controller calculates a frequency conversion step length freq_step, a new value of a frequency conversion time interval t_interval and a new frequency point value Freq_new. A step S40, the DDR memory controller takes the highest frequency point Freq_max and the lowest frequency point Freq_min as an upper limit and a lower limit respectively to adjust the new frequency point value Freq_new. A step S50, the DDR memory controller initiates or does not initiate hardware frequency conversion on the DDR SDRAM according to the new frequency point value Freq_new, and updates the last frequency conversion state last_fc. A stepS60, the DDR memory controller updates the frequency conversion time interval t_interface as a new value, and returns to the step S20. The method provides a method for realizing automatic frequency conversion of the DDR SDRAM in a hardware form.

Description

technical field [0001] The present application relates to a method for implementing a memory controller (Memory Controller). Background technique [0002] DDR SDRAM (Double Data Rate Synchronous Dynamic Random-Access Memory, Double Data Rate Synchronous Dynamic Random-Access Memory) is a common memory in electronic devices. The term DDR (double data rate, double data rate) refers to the transmission of data on both the rising and falling edges of the system clock signal. DDR memory controller (DDR memory controller) is used to drive DDR SDRAM. [0003] The operating frequency of DDR SDRAM has a great influence on the power consumption of electronic equipment. If the frequency of the DDR SDRAM is always in a high state, when the electronic device is in standby or does not call an application program, it will cause waste of resources and high power consumption. If the frequency of DDR SDRAM has been in a low state, it cannot meet the needs of running applications. Therefor...

Claims

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Application Information

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IPC IPC(8): G06F1/3225G06F1/324G06F1/3234G06F9/50G11C7/22G11C11/419
CPCG06F1/3225G06F1/324G06F1/3275G06F9/5016G11C7/222G11C11/419
Inventor 周侨高玫涛陆顺
Owner ASR MICROELECTRONICS CO LTD
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