A method of manufacturing a semiconductor device

Abstract

The invention discloses a method for preparing a semiconductor device. It forms a plurality of cylindrical lower electrodes in contact with the substrate in a stacked structure located on the substrate; performs a first etching step to etch the space between adjacent lower electrodes. Stacked structure; form a protective layer on the upper inner wall, upper outer wall and top surface of the exposed lower electrode; perform a second etching step, continue to etch the stacked structure between adjacent lower electrodes, and The lower inner wall, lower outer wall and bottom surface of the electrode are subjected to plasma treatment; the protective layer is removed and a capacitor dielectric layer conformally covering the lower electrode is deposited, and finally an upper electrode is formed on the capacitor dielectric layer. Such arrangement can suppress excessive deposition of the capacitor dielectric layer on the upper structure of the lower electrode and improve the deposition rate of the capacitor dielectric layer in the lower structure of the lower electrode, thereby effectively improving the coverage uniformity of the capacitor dielectric layer and effectively suppressing the current flow. leakage, improving the performance of semiconductor devices.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular to a method for preparing a semiconductor device. Background technique [0002] With the miniaturization of semiconductor devices, in order to increase the capacitance of the capacitor, in the prior art, the capacitor is set as a capacitor with three-dimensional electrodes, that is, the surface area of ​​the electrode is increased to increase the capacitance of the capacitor. For example, by increasing the height of the storage electrode, the capacitor is configured to have a high aspect ratio structure. [0003] However, the capacitor structure with a high aspect ratio will have the problem of uneven distribution of the dielectric layer on the entire storage electrode during the subsequent dielectric layer step coverage process, and the dielectric layer is prone to appear in the thinner dielectric layer deposition area. The layer is broken down, causing current leakage to affect the ...

AI Technical Summary

Problems solved by technology

[0004] The technical problem to be solved by the present invention is: in the prior art, the deposition of the dielectric layer on the storage electrode is not uniform, and the semiconductor device is prone to the problem of current leakage

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